74HC_HCT366_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 7 August 2012 12 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
11. Waveforms
Measurement points are given in Table 10.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Propagation delay data input (nA) to output (nY) and output transition time
001aaf585
V
M
V
M
t
PHL
t
THL
t
TLH
t
PLH
V
M
V
M
nA input
V
I
GND
V
OH
V
OL
nY output
Measurement points are given in Table 10.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7. 3-state enable and disable times
001aaf586
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
V
I
GND
V
CC
V
OL
V
OH
GND
outputs
enabled
nY output
LOW-to-OFF
OFF-to-LOW
nY output
HIGH-to-OFF
OFF-to-HIGH
OEn input
V
M
V
M
t
PZL
t
PZH
V
M
V
M
Table 10. Measurement points
Type Input Output
V
M
V
M
V
X
V
Y
74HC366-Q100 0.5V
CC
0.5V
CC
0.1 V
CC
0.9 V
CC
74HCT366-Q100 1.3 V 1.3 V 0.1 V
CC
0.9 V
CC
74HC_HCT366_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 7 August 2012 13 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
Test data is given in Table 11.
Definitions test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator
C
L
= Load capacitance including jig and probe capacitance
R
L
= Load resistor
S1 = Test selection switch
Fig 8. Load circuitry for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
V
I
V
O
R
T
R
L
S1
C
L
open
G
Table 11. Test data
Type Input Load S1 position
V
I
t
r
, t
f
C
L
R
L
t
PHL
, t
PLH
t
PZH
, t
PHZ
t
PZL
, t
PLZ
74HC366-Q100 V
CC
6ns 15pF, 50 pF 1k open GND V
CC
74HCT366-Q100 3 V 6 ns 15 pF, 50 pF 1 k open GND V
CC
74HC_HCT366_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 7 August 2012 14 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
12. Package outline
Fig 9. Package outline SOT109-1 (SO16)
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M
A
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
0.7
0.6
0.7
0.3
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1
99-12-27
03-02-19
076E07 MS-012
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.39
0.38
0.16
0.15
0.05
1.05
0.041
0.244
0.228
0.028
0.020
0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1

74HC366PW-Q100,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers 74HC366PW-Q100/TSSOP16/REEL 13
Lifecycle:
New from this manufacturer.
Delivery:
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