AD7401A
Rev. C | Page 18 of 20
APPLICATIONS INFORMATION
GROUNDING AND LAYOUT
Supply decoupling with a value of 100 nF is recommended on
both V
DD1
and V
DD2
. In applications involving high common-
mode transients, care should be taken to ensure that board
coupling across the isolation barrier is minimized. Further-
more, the board layout should be designed so that any coupling
that occurs equally affects all pins on a given component side.
Failure to ensure this may cause voltage differentials between
pins to exceed the absolute maximum ratings of the device,
thereby leading to latch-up or permanent damage. Any decoupling
used should be placed as close to the supply pins as possible.
Series resistance in the analog inputs should be minimized to
avoid any distortion effects, especially at high temperatures. If
possible, equalize the source impedance on each analog input to
minimize offset. Beware of mismatch and thermocouple effects
on the analog input PCB tracks to reduce offset drift.
EVALUATING THE AD7401A PERFORMANCE
An AD7401A evaluation board is available with split ground
planes and a board split beneath the AD7401A package to
ensure isolation. This board allows access to each pin on the
device for evaluation purposes.
The evaluation board package includes a fully assembled and
tested evaluation board, documentation, and software for
controlling the board from the PC via the EVAL-CED1Z. The
software also includes a sinc3 filter implemented on an FPGA.
The evaluation board is used in conjunction with the EVAL-
CED1Z board and can also be used as a standalone board. The
software allows the user to perform ac (fast Fourier transform)
and dc (histogram of codes) tests on the AD7401A. The soft-
ware and documentation are on a CD that is shipped with the
evaluation board.
INSULATION LIFETIME
All insulation structures, subjected to sufficient time and/or
voltage, are vulnerable to breakdown. In addition to the testing
performed by the regulatory agencies, Analog Devices has
carried out an extensive set of evaluations to determine the
lifetime of the insulation structure within the AD7401A.
These tests subjected devices to continuous cross-isolation
voltages. To accelerate the occurrence of failures, the selected
test voltages were values exceeding those of normal use. The
time-to-failure values of these units were recorded and used
to calculate acceleration factors. These factors were then used
to calculate the time-to-failure under normal operating
conditions. The values shown in Table 7 are the lesser of the
following two values:
• The value that ensures at least a 50-year lifetime of
continuous use.
• The maximum CSA/VDE approved working voltage.
It should also be noted that the lifetime of the AD7401A varies
according to the waveform type imposed across the isolation
barrier. The iCoupler insulation structure is stressed differently
depending on whether the waveform is bipolar ac, unipolar ac,
or dc. Figure 30, Figure 31, and Figure 32 illustrate the different
isolation voltage waveforms.
0V
RATED PEAK VOLTAGE
7332-030
Figure 30. Bipolar AC Waveform
0V
RATED PEAK VOLTAGE
07332-031
Figure 31. Unipolar AC Waveform
0V
RATED PEAK VOLTAGE
07332-032
Figure 32. DC Waveform
