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MAX5156BCEE+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
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MAX5156/MAX5157
Low-Power, Dual, 12-Bit Voltage-Output DACs
with Configurable Outputs
________________________________________________________________
Maxim Integrated Products
1
19-1317; Rev 1; 12/97
_______________General Description
The MAX5156/MAX5157 low-power, serial, voltage-out-
put, dual 12-bit digital-to-analog converters (DACs)
consume only 500µA from a single +5V (MAX5156) or
+3V (MAX5157) supply. These devices feature Rail-to-
Rail
®
output swing and are available in space-saving
16-pin QSOP and DIP packages. Access to the invert-
ing input allows for specific gain configurations, remote
sensing, and high output current capability, making
these devices ideally suited for industrial process con-
trols. These devices are also well suited for digitally
programmable (4–20mA) current loops.
The 3-wire serial interface is SPI™/QSPI™ and
Microwire™ compatible. Each DAC has a double-
buffered input organized as an input register followed
by a DAC register, which allows the input and DAC reg-
isters to be updated independently or simultaneously.
Additional features include a programmable shutdown
(2µA), hardware-shutdown lockout, a separate voltage
reference for each DAC, power-on reset, and an active-
low clear input (CL) that resets all registers and DACs to
zero. The MAX5156/MAX5157 provide a programmable
logic output pin for added functionality, and a serial-
data output pin for daisy chaining.
________________________Applications
Industrial Process Control Motion Control
Digital Offset and Gain Digitally Programmable
Adjustment 4–20mA Current Loops
Remote Industrial Controls Automatic Test Equipment
____________________________Features
♦ 12-Bit Dual DAC with Configurable Output
Amplifier
♦ Single-Supply Operation: +5V (MAX5156)
+3V (MAX5157)
♦ Rail-to-Rail Output Swing
♦ Low Quiescent Current: 500µA (normal operation)
2µA (shutdown mode)
♦ Power-On Reset Clears DAC Outputs to Zero
♦ SPI/QSPI and Microwire Compatible
♦ Space-Saving 16-Pin QSOP Package
_______________Ordering Information
Rail-to-Rail is a registered trademark of Nippon Motorola Ltd. SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.
Ordering Information continued at end of data sheet.
Pin Configuration appears at end of data sheet.
REFACLDOUT
16-BIT
SHIFT
REGISTER
SR
CONTROL
INPUT
REG A
SCLK
UPO
REFB
DINCS
DAC A
DAC B
FBA
FBB
OUTA
OUTB
DAC
REG A
INPUT
REG B
LOGIC
OUTPUT
DECODE
CONTROL
DAC
REG B
MAX5156
MAX5157
V
DD
AGND
DGNDPDL
_________________________________________________________Functional Diagram
INL
(LSB)
PIN-PACKAGETEMP. RANGEPART
±116 QSOP0°C to +70°CMAX5156BCEE
±1/2
±1
±1/2
16 QSOP
16 Plastic DIP
16 Plastic DIP0°C to +70°C
0°C to +70°C
0°C to +70°CMAX5156ACEE
MAX5156BCPE
MAX5156ACPE
MAX5156/MAX5157
Low-Power, Dual, 12-Bit Voltage-Output DACs
with Configurable Outputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—MAX5156
(V
DD
= +5V ±10%, V
REFA
= V
REFB
= 2.5V, R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C, output buffer connected in unity-gain configuration (Figure 9).)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
DD
to AGND............................................................-0.3V to +6V
V
DD
to DGND ...........................................................-0.3V to +6V
AGND to DGND..................................................................±0.3V
FBA, FBB to AGND.....................................-0.3V to (V
DD
+ 0.3V)
REF_, OUT_ to AGND.................................-0.3V to (V
DD
+ 0.3V)
Digital Inputs (SCLK, DIN, CS, CL, PDL)
to DGND................................................................-0.3V to +6V
Digital Outputs (DOUT, UPO) to DGND.....-0.3V to (V
DD
+ 0.3V)
Maximum Current into Any Pin.........................................±20mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.5mW/°C above +70°C) .............593mW
QSOP (derate 8.30mW/°C above +70°C).....................667mW
CERDIP (derate 10.00mW/°C above +70°C)................800mW
Operating Temperature Ranges
MAX5152_C_E/MAX5153_C_E ...........................0°C to +70°C
MAX5152_E_E/MAX5153_E_E..........................-40°C to +85°C
MAX5152_MJE/MAX5153_MJE......................-55°C to +125°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
V
IN
= 0V to V
DD
CL, PDL, CS, DIN, SCLK
CL, PDL, CS, DIN, SCLK
Input code = 1FFE hex,
V
REF
= 1Vp-p at 2.5V
DC
, f = 25kHz
Input code = 0000 hex,
V
REF
= (V
DD
- 1.4Vp-p) at 1kHz
4.5V ≤ V
DD
≤ 5.5V
Input code = 1FFE hex,
V
REF
= 0.67Vp-p at 2.5V
DC
Normalized to 2.5V
(Note 1)
Guaranteed monotonic
Code = 10
Minimum with code 1554 hex
Normalized to 2.5V
CONDITIONS
pF8C
IN
Input Capacitance
µA0.001 ±1I
IN
Input Leakage Current
mV200V
HYS
Input Hysteresis
V0.8V
IL
Input Low Voltage
V3V
IH
Input High Voltage
dB82SINAD
Signal-to-Noise plus
Distortion Ratio
dB-85Reference Feedthrough
kHz600Reference 3dB Bandwidth
kΩ14 20R
REF
Reference Input Resistance
V0 V
DD
- 1.4REFReference Input Range
±1/2
Bits12NResolution
µV/V20 200PSRRV
DD
Power-Supply Rejection Ratio
ppm/°C3Gain-Error Tempco
LSB-0.5 ±3Gain Error
LSB
±1
INLIntegral Nonlinearity
LSB±1DNLDifferential Nonlinearity
mV±6V
OS
Offset Error
ppm/°C3TCV
OS
Offset Tempco
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX5156A
MAX5156B
STATIC PERFORMANCE
REFERENCE INPUT
MULTIPLYING-MODE PERFORMANCE
DIGITAL INPUTS
MAX5156/MAX5157
Low-Power, Dual, 12-Bit Voltage-Output DACs
with Configurable Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—MAX5156 (continued)
(V
DD
= +5V ±10%, V
REFA
= V
REFB
= 2.5V, R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C, output buffer connected in unity-gain configuration (Figure 9).)
Note 1: Accuracy is specified from code 10 to code 4095.
Note 2: Accuracy is better than 1LSB for V
OUT
greater than 6mV and less than V
DD
- 50mV. Guaranteed by PSRR test at the end points.
Note 3: Digital inputs are set to either V
DD
or DGND, code = 0000 hex, R
L
= ∞.
Note 4: SCLK minimum clock period includes rise and fall times.
CS = V
DD
, f
DIN
= 100kHz, V
SCLK
= 5Vp-p
I
SOURCE
= 2mA
Rail-to-rail (Note 2)
To 1/2LSB of full-scale, V
STEP
= 2.5V
I
SINK
= 2mA
CONDITIONS
nV-s5Digital Crosstalk
nV-s5Digital Feedthrough
µs25Time Required to Exit Shutdown
µA0 ±0.1I
FB
Current into FBA or FBB
VV
DD
- 0.5V
OH
Output High Voltage
V0 to V
DD
Output Voltage Swing
µs15Output Settling Time
V0.13 0.40V
OL
Output Low Voltage
V/µs0.75SRVoltage Output Slew Rate
UNITSMIN TYP MAXSYMBOLPARAMETER
(Note 4)
(Note 3)
(Note 3)
ns40t
CL
SCLK Pulse Width Low
ns40t
CH
SCLK Pulse Width High
ns100t
CP
SCLK Clock Period
µA0 ±1Reference Current in Shutdown
µA2 10I
DD(SHDN)
Power-Supply Current in
Shutdown
mA0.5 0.65I
DD
Power-Supply Current
V4.5 5.5V
DD
Positive Supply Voltage
ns40t
DS
DIN Setup Time
ns0t
CHS
SCLK Rise to CS Rise Hold Time
ns40t
CSS
CS Fall to SCLK Rise Setup Time
C
LOAD
= 200pF
C
LOAD
= 200pF
ns80t
DO2
SCLK Fall to DOUT Valid
Propagation Delay
ns80t
DO1
SCLK Rise to DOUT Valid
Propagation Delay
ns0t
DH
DIN Hold Time
ns100t
CSW
CS Pulse Width High
ns40t
CS1
CS Rise to SCLK Rise Hold
ns10t
CS0
SCLK Rise to CS Fall Delay
DIGITAL OUTPUTS (DOUT, UPO)
DYNAMIC PERFORMANCE
POWER SUPPLIES
TIMING CHARACTERISTICS
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

MAX5156BCEE+T

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Buy MAX5156BCEE+T
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 12-Bit 2Ch Precision DAC
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