QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 997
10/12 BIT 250, 210 AND 170 MSPS ADC
2
Table 2.
Performance Summary (T
A
= 25°C)
PARAMETER CONDITION VALUE
Supply Voltage
Depending on sampling rate and the A/D converter provided,
this supply must provide up to 500mA.
3.3V ±0.3V (10%); The 2.5V sup-
ply required by the ADC is regu
locally by U8 from the 3.3V
Analog input range Depending on Sense Pin Voltage (at converter inputs) 1V
PP
to 2V
PP
Minimum Logic High 1.7V Logic Input Voltages: OE, SHDN
Maximum Logic Low 0.7V
Minimum Logic High @ -3.4mA w/100
Ω
Termination 1.2V +170mV
Logic Output Voltage
(FIN1108T LVDS Buffer)
Maximum Logic Low @ +3.4mA w/100
Ω
Termination 1.2V – 170mV
Sampling Frequency (Convert Clock Frequency) See Table 1
Encode Clock Level 50
Ω
Source Impedance. (Convert Clock input is capacitor cou-
pled on board and terminated with 50
Ω
.
)
0.2V
P-P
2.5V
P-P
Sine Wave
or Square wave
Resolution See Table 1
Input frequency range See Table 1
SFDR See Applicable Data Sheet
SNR See Applicable Data Sheet
QUICK START PROCEDURE
Demonstration circuit 997 is easy to set up to evaluate
the performance of any of the LTC2242 family of High
Speed LVDS output A/D converters - LTC2242-12,
LTC2241-12, LTC2240-12, LTC2242-10, LTC2241-10 or
LTC2240-10. Refer to Figure 1 for proper measure-
ment equipment setup and follow the procedure below:
