LTC3890-2
19
38902f
APPLICATIONS INFORMATION
The inductor value has a direct effect on ripple current. The
inductor ripple current, ΔI
L
, decreases with higher induc-
tance or higher frequency and increases with higher V
IN
:
ΔI
L
=
1
f
()
L
()
V
OUT
1–
V
OUT
V
IN
Accepting larger values of ΔI
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ΔI
L
= 0.3(I
MAX
). The maximum
ΔI
L
occurs at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R
SENSE
. Lower
inductor values (higher ΔI
L
) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or molypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value, but it is very dependent on inductance
value selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
for high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
Two external power MOSFETs must be selected for each
controller in the LTC3890-2: one N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
CC
voltage.
This voltage is typically 5.1V during start-up (see EXTV
CC
Pin Connection). Consequently, logic-level threshold
MOSFETs must be used in most applications. Pay close
attention to the BV
DSS
specification for the MOSFETs as well.
Selection criteria for the power MOSFETs include the
on-resistance, R
DS(ON)
, Miller capacitance, C
MILLER
, input
voltage and maximum output current. Miller capacitance,
C
MILLER
, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C
MILLER
is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in V
DS
. This result is
then multiplied by the ratio of the application applied V
DS
to the gate charge curve specified V
DS
. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V
OUT
V
IN
Synchronous Switch Duty Cycle =
V
IN
V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
()
2
1
()
R
DS(ON)
+
V
IN
()
2
I
MAX
2
R
DR
()
C
MILLER
()
1
V
INTVCC
–V
THMIN
+
1
V
THMIN
f
()
P
SYNC
=
V
IN
–V
OUT
V
IN
I
MAX
()
2
1
()
R
DS(ON)
LTC3890-2
20
38902f
APPLICATIONS INFORMATION
where δ is the temperature dependency of R
DS(ON)
and
R
DR
(approximately 2) is the effective driver resistance
at the MOSFETs Miller threshold voltage. V
THMIN
is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+ δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in
Figure 11 conduct during the dead-time between the
conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on,
storing charge during the dead-time and requiring a
reverse recovery period that could cost as much as 3%
in efficiency at high V
IN
. A 1A to 3A Schottky is generally
a good compromise for both regions of operation due
to the relatively small average current. Larger diodes
result in additional transition losses due to their larger
junction capacitance.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula shown in Equation 1 to determine the maximum
RMS capacitor current requirement. Increasing the out-
put current drawn from the other controller will actually
decrease the input RMS ripple current from its maximum
value. The out-of-phase technique typically reduces the
input capacitors RMS ripple current by a factor of 30%
to 70% when compared to a single phase power supply
solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
I
MAX
V
IN
V
OUT
()
V
IN
–V
OUT
()
1/2
(1)
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3890-2, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
LTC3890-2
21
38902f
1/2 LTC3890-2
V
FB
V
OUT
R
B
C
FF
R
A
38902 F05
Figure 5. Setting Output Voltage
APPLICATIONS INFORMATION
The benefit of the LTC3890-2 2-phase operation can be
calculated by using Equation 1 for the higher power control-
ler and then calculating the loss that would have resulted
if both controller channels switched on at the same time.
The total RMS power lost is lower when both controllers
are operating due to the reduced overlap of current pulses
required through the input capacitors ESR. This is why
the input capacitors requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benefit of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the efficiency testing.
The drains of the top MOSFETs should be placed within
1cm of each other and share a common C
IN
(s). Separating
the drains and C
IN
may produce undesirable voltage and
current resonances at V
IN
.
A small (0.1µF to 1µF) bypass capacitor between the chip
V
IN
pin and ground, placed close to the LTC3890-2, is
also suggested. A 10 resistor placed between C
IN
(C1)
and the V
IN
pin provides further isolation between the
two channels.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔV
OUT
) is approximated by:
ΔV
OUT
≈ΔI
L
ESR+
1
8•f•C
OUT
where f is the operating frequency, C
OUT
is the output
capacitance and ΔI
L
is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ΔI
L
increases with input voltage.
Setting Output Voltage
The LTC3890-2 output voltages are each set by an exter-
nal feedback resistor divider carefully placed across the
output, as shown in Figure 5. The regulated output voltage
is determined by:
V
OUT
= 0.8V 1+
R
B
R
A
To improve the frequency response, a feedforward ca-
pacitor, C
FF
, may be used. Great care should be taken to
route the V
FB
line away from noise sources, such as the
inductor or the SW line.
Tracking and Soft-Start (TRACK/SS Pins)
The start-up of each V
OUT
is controlled by the voltage on
the respective TRACK/SS pin. When the voltage on the
TRACK/SS pin is less than the internal 0.8V reference, the
LTC3890-2 regulates the V
FB
pin voltage to the voltage on
the TRACK/SS pin instead of 0.8V. The TRACK/SS pin can
be used to program an external soft-start function or to
allow V
OUT
to track another supply during start-up.
Soft-start is enabled by simply connecting a capacitor
from the TRACK/SS pin to ground, as shown in Figure 6.
An internal 1µA current source charges the capacitor,
providing a linear ramping voltage at the TRACK/SS pin.
The LTC3890-2 will regulate the V
FB
pin (and hence V
OUT
)
according to the voltage on the TRACK/SS pin, allowing
V
OUT
to rise smoothly from 0V to its final regulated value.
The total soft-start time will be approximately:
t
SS
= C
SS
0.8V
A

LTC3890MPUH-2#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators High Voltage Dual Output Synchronous Step-Down Controller
Lifecycle:
New from this manufacturer.
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