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TSM006 Functional Description
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4 Functional Description
TSM006: PWM Controller IC.
UVLO function
The Under Voltage Lock Out function disables the
whole device when supply voltage is lower than
the threshold.
Vref block
The Vref block provides a 5V reference voltage.
An internal Vref status signal is active when Vref
is lower than 4.7V and is used to drive the output
driver low when Vref is not valid.
Current sense input
A voltage proportional to the output inductor
current is applied to the CS pin. The control IC
uses this information to perform current mode
control. The PWM function will be stopped if the
CS pin voltage is greater than 1.0V.
Current leading edge blanking
An internal delay is built into the IC to mask the
first 100ns of the current sense signal. This delay
is made of a capacitor charged with a current
source. The capacitor is discharged when CT
reaches its maximum level.
COMP input
This pin is connected to the current comparator
for current mode control. The pin should be
connected to the collector (primary side) of an
optocoupler which anode (secondary side) is
driven by the output of error amplifier.
The COMP input is used to set the reference level
for the current sense comparator. The current
sense threshold is set to (Vcomp - 2 * Vbe) / 3.
During the soft start period, COMP voltage is
clamped to the SS pin plus two Vbe voltage.
Startup latch
The startup latch is set when the IC exits from
standby mode or UVLO state. It is reset when the
CT capacitor is discharged for the first time.
Output driver
The OUT totem pole output is capable to sink and
source more than 1.0A (peak) in order to direct
drive a power MOSFET.
Oscillator
A capacitor from the RT/CT pin to GND and a
resistor to the VREF set the oscillating frequency.
The maximum duty cycle at the OUT pin is limited
at 77%.
Frequency modulation
A FM generator adds a small amount of jitter on
the oscillator frequency in a way that reduces the
conducted and radiated EMI. The FM frequency is
set by an external capacitor connected to the FM
pin.
Slope compensation
A buffered Rt/Ct voltage is brought to the
Cslope pin. This signal is used to provide the
necessary slope compensation.
Soft start
A capacitor from the SS pin to GND provides the
soft start function. The capacitor starts to charge
when VIN reaches the UVLO threshold and Vref is
good.
The soft start block enables the IC to start with a
progressive PWM duty cycle. The soft start
comparator drives the output driver low when the
SS pin voltage is greater than the CT pin voltage
minus one Vbe voltage.
During soft start, the COMP pin voltage is
clamped to the SS pin voltage plus two Vbe
voltage, limiting the maximum peak current.
External reference pin
An external resistor at REX pin sets the internal
current reference.
