LTC4098/LTC4098-1
19
40981fc
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency (35kHz) to indicate the two possible faults. While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When charge
current drops to 1/10th the value programmed by R
PROG
,
the CHRG pin is released (Hi-Z). The CHRG pin does not
respond to the C/10 threshold if the LTC4098/LTC4098-1
are in V
BUS
current limit. This prevents false end-of-charge
indications due to insufficient power available to the battery
charger. If a fault occurs while charging, the pin is switched
at 35kHz. While switching, its duty cycle is modulated
between a high and low value at a very low frequency. The
low and high duty cycles are disparate enough to make
an LED appear to be on or off thus giving the appearance
of “blinking”. Each of the two faults has its own unique
“blink” rate for human recognition as well as two unique
duty cycles for machine recognition.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
STATUS FREQUENCY
MODULATION
(BLINK) FREQUENCY
DUTY
CYCLES
Charging 0Hz 0Hz (Low Z) 100%
I
BAT
< C/10 0Hz 0Hz (Hi-Z) 0%
NTC Fault 35kHz 1.5Hz at 50% 6.25% or 93.75%
Bad Battery 35kHz 6.1Hz at 50% 12.5% or 87.5%
Notice that an NTC fault is represented by a 35kHz pulse
train whose duty cycle toggles between 6.25% and 93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pin gives the battery fault indication. For this fault, a human
would easily recognize the frantic 6.1Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12.5% or 87.5% duty cycles as a bad cell fault.
Because the LTC4098/LTC4098-1 are 3-terminal PowerPath
products, system load is always prioritized over battery
charging. Due to excessive system load, there may not be
sufficient power to charge the battery beyond the bad-cell
threshold voltage within the bad-cell timeout period. In
this case the battery charger will falsely indicate a bad cell.
System software may then reduce the load and reset the
battery charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
OPERATION
LTC4098/LTC4098-1
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NTC Thermistor
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to
the battery pack. The NTC circuitry is shown in the Block
Diagram.
To use this feature, connect the NTC thermistor, R
NTC
,
between the NTC pin and ground and a bias resistor, R
NOM
,
from NTCBIAS to NTC. R
NOM
should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor
at 25°C (R25).
The LTC4098/LTC4098-1 will pause charging when the
resistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k (for a Vishay curve 1
thermistor, this corresponds to approximately 40°C). If
the battery charger is in constant-voltage (float) mode,
the safety timer also pauses until the thermistor indicates
a return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4098/
LTC4098-1 are also designed to pause charging when
the value of the NTC thermistor increases to 3.25 times
the value of R25. For a Vishay curve 1 thermistor, this
resistance, 325k, corresponds to approximately 0°C. The
hot and cold comparators each have approximately 3°C
of hysteresis to prevent oscillation about the trip point.
Grounding the NTC pin disables all NTC functionality.
Figure 6 is a flow chart representation of the battery charger
algorithm employed by the LTC4098/LTC4098-1.
Thermal Regulation
To prevent thermal damage to the LTC4098/LTC4098-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to approximately 110°C.
Thermal regulation protects the LTC4098/LTC4098-1 from
excessive temperature due to high power operation or
high ambient thermal conditions, and allows the user to
push the limits of the power handling capability with a
given circuit board design without risk of damaging the
LTC4098/LTC4098-1 or external components. The benefit
of the LTC4098/LTC4098-1 thermal regulation loop is that
charge current can be set according to actual conditions
rather than worst-case conditions for a given application
with the assurance that the charger will automatically
reduce the current in worst-case conditions.
Shutdown Mode
The USB switching regulator is enabled whenever V
BUS
is above the UVLO voltage and the LTC4098/LTC4098-1
are not in one of the two USB suspend modes (500μA or
2.5mA). When power is available from both the USB and
high voltage inputs, the high voltage regulator is prioritized
and the USB switching regulator is disabled.
The ideal diode is enabled at all times and cannot be
disabled.
OPERATION
LTC4098/LTC4098-1
21
40981fc
CLEAR EVENT TIMER
NTC OUT OF RANGE
CHRG CURRENTLY
Hi-Z
INDICATE
NTC FAULT
AT CHRG
BATTERY STATE
CHARGE AT
1030V/R
PROG
RATE
PAUSE EVENT TIMER
PAUSE EVENT TIMER
CHARGE WITH
FIXED VOLTAGE
(V
FLOAT
)
RUN EVENT TIMER
CHARGE AT
100V/R
PROG
(C/10 RATE)
RUN EVENT TIMER
ASSERT CHRG LOW
POWER ON/
ENABLE CHARGER
TIMER > 30 MINUTES TIMER > 4 HOURS
BAT > 2.85V BAT < V
RECHRG
I
BAT
< C/10
NO
NO
YES
YES
YES
YES
YES
YES
NO
NO
BAT > V
FLOAT
EBAT < 2.85V
2.85V < BAT < V
FLOAT
E
NO
NO
NONO
INHIBIT CHARGING STOP CHARGING
INDICATE BATTERY
FAULT AT CHRG
BAT RISING
THROUGH
V
RECHRG
BAT FALLING
THROUGH
V
RECHRG
CHRG HIGH-Z CHRG Hi-Z
40981 F06
NO
YES
YES
INHIBIT CHARGING
YES
Figure 6. Battery Charger State Diagram
OPERATION

LTC4098EUDC-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management High efficiency I2C Controlled USB Power Manager/Charger with Overvoltage Protection
Lifecycle:
New from this manufacturer.
Delivery:
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