AD8145 Data Sheet
2.0
–2.0
0 50
TIME (ns)
VOLTAGE (V)
ERROR (%)
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
0.5
–0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
5
10
15 20
25 30
35
40 45
ERROR
OUTPUT
INPUT
06307-048
Figure 22. Settling Time
–50
–80
0.1 100
FREQUENCY (MHz)
DISTORTION (dBc)
1 10
–55
–60
–65
–70
–75
V
S
= ±5V
V
S
= +5V
V
OUT
= 2V p-p
06307-023
Figure 23. Second Harmonic Distortion vs. Frequency and Power Supplies,
V
OUT
= 2 V p-p, G = 1
–50
–80
0.1 100
FREQUENCY (MHz)
DISTORTION (dBc)
1 10
–55
–60
–65
–70
–75
V
OUT
= 2V p-p
V
S
= +5V
V
S
= ±5V
06307-024
Figure 24. Second Harmonic Distortion vs. Frequency and Power Supplies,
V
OUT
= 2 V p-p, G = 2
4500
0
0 5.0
OUTPUT VOLTAGE (V p-p)
SLEW RATE (V/µs)
4000
3500
3000
2500
2000
1500
1000
500
0.5 1.0 1.5 2.0 2.5 3.0 3.5
4.0
4.5
NEGATIVE
SLEW RATE
POSITIVE
SLEW RATE
06307-049
Figure 25. Slew Rate vs. Output Voltage Swing
–50
–120
0.1 100
FREQUENCY (MHz)
DISTORTION (dBc)
1 10
V
OUT
= 2V p-p
–60
–70
–80
–90
–100
–110
V
S
= +5V
V
S
= ±5V
06307-026
Figure 26. Third Harmonic Distortion vs. Frequency and Power Supplies,
V
OUT
= 2 V p-p, G = 1
–50
–120
0.1 100
FREQUENCY (MHz)
DISTORTION (dBc)
1 10
V
OUT
= 2V p-p
–60
–70
–80
–90
–100
–110
V
S
= +5V
V
S
= ±5V
06307-027
Figure 27. Third Harmonic Distortion vs. Frequency and Power Supplies,
V
OUT
= 2 V p-p, G = 2
Rev. B | Page 12 of 21
Data Sheet AD8145
65
15
–60 120
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
60
55
50
45
40
35
30
25
20
–40 –20 0
20 40 60 80 100
R
L
= OPEN CIRCUIT
I
CC
(±5V)
I
EE
(±2.5V)
I
EE
(±5V)
I
CC
(±2.5V)
06307-050
Figure 28. Power Supply Current vs. Temperature
10
–90
0.01 1000
FREQUENCY (MHz)
PSRR (dB)
0.1 1 10 100
0
–10
–20
–30
–40
–50
–60
–70
–80
BLACK = +5V
GRAY = ±5V
06307-029
Figure 29. Positive Power Supply Rejection Ratio (PSRR) vs. Frequency
3.5
0
–15 15
V
IN
(mV)
V
OUT
(V)
3.0
2.5
2.0
1.5
1.0
0.5
–10 –5 0 5 10
06307-051
Figure 30. Comparator Hysteresis
5
–5
0 500
TIME (ns)
VOLTAGE (V)
4
3
2
1
0
–1
–2
–3
–4
50
100
150 200 250 300 350 400
450
G = 2
+5V OUTPUT
+5V 2 × V
IN
±5V OUTPUT
±5V 2 × V
IN
06307-030
Figure 31. Output Overdrive Recovery
10
–90
0.01 1000
FREQUENCY (MHz)
PSRR (dB)
0.1 1 10 100
0
–10
–20
–30
–40
–50
–60
–70
–80
BLACK = ±2.5V
GRAY = ±5V
06307-032
Figure 32. Negative Power Supply Rejection Ratio (PSRR) vs. Frequency
Rev. B | Page 13 of 21
AD8145 Data Sheet
THEORY OF OPERATION
The AD8145 amplifiers use an architecture called active feedback,
which differs from that of conventional op amps. The most
obvious differentiating feature is the presence of two separate
pairs of differential inputs compared to a conventional op amps
single pair. Typically, for the active feedback architecture, one of
these input pairs is driven by a differential input signal while
the other is used for the feedback. This active stage in the feedback
path is where the term active feedback is derived. The AD8145
has an internal feedback resistor from each amplifier output to
the negative input of its feedback input stage. This limits the
possible closed-loop gain configurations for the AD8145.
The active feedback architecture offers several advantages over a
conventional op amp in several types of applications. Among
these are excellent common-mode rejection, wide input common-
mode range, and a pair of inputs that are high impedance and
completely balanced in a typical application. In addition, while
an external feedback network establishes the gain response as in a
conventional op amp, its separate path makes it entirely independent
of the signal input. This eliminates any interaction between the
feedback and input circuits, which traditionally causes problems
with CMRR in conventional differential-input op amp circuits.
Another advantage of active feedback is the ability to change the
polarity of the gain merely by switching the differential inputs.
A high input impedance inverting amplifier can therefore be
made. Besides high input impedance, a unity-gain inverter with
the AD8145 has a noise gain of unity, producing lower output
noise and higher bandwidth than op amps that have noise gain
equal to 2 for a unity-gain inverter.
The two differential input stages of the AD8145 are each
transconductance stages that are well matched. These stages
convert the respective differential input voltages to internal
currents. The currents are then summed and converted to a
voltage, which is buffered to drive the output. The compensation
capacitor is included in the summing circuit. When the feedback
path is closed around the part, the output drives the feedback
input to the voltage that causes the internal currents to sum to
zero. This occurs when the two differential inputs are equal and
opposite; that is, their algebraic sum is zero.
In a closed-loop application, a conventional op amp has its
differential input voltage driven to near zero under non-
transient conditions. The AD8145 generally has differential
input voltages at each of its input pairs, even under equilibrium
conditions. As a practical consideration, it is necessary to limit
the differential input voltage internally with a clamp circuit.
Therefore, the input dynamic ranges are limited to approximately
2.5 V (see the Specifications section for more details). For this
reason, it is not recommended to reverse the input and feedback
stages of the AD8145, even though some normal functionality
may be observed under some conditions.
Rev. B | Page 14 of 21

AD8145YCPZ-R2

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Video Amplifiers High Speed Triple Receiver
Lifecycle:
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