7
Electrical Specications
Test conditions that are not specied can be anywhere within the recommended operating range.
All typical specications are at T
A
= +25 °C, V
DD1
= V
DD2
= +5 V.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
DC Specications
Logic Low Input I
DD1L
6.0 10.0 mA V
I
= 0 V 2
Supply Current
Logic High Input I
DD1H
1.5 3.0 mA V
I
= V
DD1
Supply Current
Output Supply Current I
DD2L
5.5 9.0 mA
I
DD2H
7.0 9.0
Input Current I
I
–10 10
µ
A
Logic High Output V
OH
4.4 5.0 V I
O
= -20
µ
A, V
I
= V
IH
1, 2
Voltage 4.0 4.8 I
O
= -4 mA, V
I
= V
IH
Logic Low Output V
OL
0 0.1 V I
O
= 20
µ
A, V
I
= V
IL
Voltage
0.1 V
I
O
= 400
µ
A, V
I
= V
IL
0.5 1.0 I
O
= 4 mA, V
I
= V
IL
Switching Specications
Propagation Delay Time t
PHL
20 40 ns C
L
= 15 pF 3, 6 3
to Logic Low Output CMOS Signal Levels
Propagation Delay Time t
PLH
23 40 ns
to Logic High Output
Pulse Width PW 40 ns
Data Rate 25 MBd
Pulse Width Distortion PWD
7721/0721
3 6 ns 7 4
|t
PHL
- t
PLH
|
7720/0720
3 8 ns
Propagation Delay Skew t
PSK
20 5
Output Rise Time t
R
9 ns
(10 - 90%)
Output Fall Time t
F
8 ns
(90 - 10%)
Common Mode |CM
H
| 10 20 kV/
µ
s V
I
= V
DD1
, V
O
> 6
Transient Immunity at 0.8 V
DD1
,
Logic High Output V
CM
= 1000 V
Common Mode |CM
L
| 10 20 V
I
= 0 V, V
O
> 0.8 V,
Transient Immunity at V
CM
= 1000 V
Logic Low Output
Input Dynamic Power C
PD1
60 pF 7
Dissipation
Capacitance
Output Dynamic Power C
PD2
10
Dissipation
Capacitance
8
Notes:
1. Absolute Maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee functionality.
2. The LED is ON when V
I
is low and OFF when V
I
is high.
3. t
PHL
propagation delay is measured from the 50% level on the falling edge of the V
I
signal to the 50% level of the falling edge of the V
O
signal.
t
PLH
propagation delay is measured from the 50% level on the rising edge of the V
I
signal to the 50% level of the rising edge of the V
O
signal.
4. PWD is dened as |t
PHL
- t
PLH
|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
5. t
PSK
is equal to the magnitude of the worst case dierence in t
PHL
and/or t
PLH
that will be seen between units at any given temperature within
the recommended operating conditions.
6. CM
H
is the maximum common mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common
mode voltage slew rate that can be sustained while maintaining V
O
< 0.8 V. The common mode voltage slew rates apply to both rising and
falling common mode voltage edges.
7. Unloaded dynamic power dissipation is calculated as follows: C
PD
* V
DD2
* f + I
DD
* V
DD
, where f is switching frequency in MHz.
8. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
9. In accordance with UL1577, each HCPL-072X is proof tested by applying an insulation test voltage ≥4500 V
RMS
for 1 second (leakage detection
current limit, I
I-O
≤5 µA). Each HCPL-772X is proof tested by applying an insulation test voltage ≥4500 Vrms for 1 second (leakage detection
current limit. I
I-O
≤ 5 µA.)
10. The Input-Output Momentary With stand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to your equipment level safety specication or Avago Application Note 1074 “Optocou-
pler Input-Output Endurance Voltage.
11. C
I
is the capacitance measured at pin 2 (V
I
).
Figure 1. Typical output voltage vs. input volt-
age
Figure 2. Typical input voltage switching thresh-
old vs. input supply voltage
Figure 3. Typical propagation delays vs. tem-
perature
Package Characteristics
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary 072X V
ISO
3750 Vrms RH ≤50%, 8, 9,
Withstand Voltage 772X 3750 t = 1 min., 10
Option 020 5000 T
A
= 25°C
Resistance R
I-O
10
12
Ω V
I-O
= 500 Vdc 8
(Input-Output)
Capacitance C
I-O
0.6 pF f = 1 MHz
(Input-Output)
Input Capacitance C
I
3.0 11
Input IC Junction-to-Case -772X θ
jci
145 °C/W Thermocouple
Thermal Resistance -072X 160 located at center
Output IC Junction-to-Case -772X θ
jco
140 underside of package
Thermal Resistance -072X 135
Package Power Dissipation P
PD
150 mW
V
O
(V)
0
0
V
I
(V)
5
4
1
41 2 3
5
3
2
0 °C
25 °C
85 °C
V
ITH
(V)
4.5
1.6
V
DD1
(V)
5.5
2.1
1.7
5.254.75 5
2.2
2.0
1.8
1.9
0 °C
25 °C
85 °C
T
PLH
, T
PHL
(ns)
0
15
T
A
(C)
80
27
17
6020 30
29
25
19
21
10 40 50 70
23
T
PLH
T
PHL
9
Figure 4. Typical pulse width distortion vs.
temperature
Figure 5. Typical rise time vs. temperature Figure 6. Typical fall time vs. temperature
Figure 7. Typical propagation delays vs. output
load capacitance
Figure 8. Typical pulse width distortion vs.
output load capacitance
Figure 9. Thermal derating curve, dependence of safety limiting value with case temperature per
IEC/EN/DIN EN 60747-5-5.
PWD
(ns)
0
0
T
A
(C)
80
3
6020
4
1
40
2
T
R
(ns)
0
8
T
A
(C)
80
10
6020
11
9
40
T
F
(ns)
0
2
T
A
(C)
80
6
6020
7
3
40
5
4
T
PLH
, T
PHL
(ns)
15
15
C
I
(pF)
50
27
40
29
17
30
23
21
2520 35 45
19
25
T
PLH
T
PHL
PWD
(ns)
15
0
C
I
(pF)
50
5
40
6
1
30
3
2520 35 45
2
4
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
A
– CASE TEMPERATURE – °C
20050
400
12525 75 100 150
600
800
200
100
300
500
700
175
(230)
P
S
(mW)
I
S
(mA)
STANDARD 8 PIN DIP PRODUCT
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
A
– CASE TEMPERATURE – °C
20050
400
12525 75 100 150
600
800
200
100
300
500
700
175
(150)
P
S
(mW)
I
S
(mA)
SURFACE MOUNT SO8 PRODUCT

HCPL-0720-500E

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
High Speed Optocouplers 25MBd 1Ch 150mA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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