NCP43080
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31
Figure 62. Typical MOSFET Capacitances
Dependency on V
DS
and V
GS
Voltages
C
iss
+ C
gs
) C
gd
C
rss
+ C
gd
C
oss
+ C
ds
) C
gd
Therefore, the input capacitance of a MOSFET operating
in ZVS mode is given by the parallel combination of the gate
to source and gate to drain capacitances (i.e. C
iss
capacitance
for given gate to source voltage). The total gate charge,
Q
g_total
, of most MOSFETs on the market is defined for hard
switching conditions. In order to accurately calculate the
driving losses in a SR system, it is necessary to determine the
gate charge of the MOSFET for operation specifically in a
ZVS system. Some manufacturers define this parameter as
Q
g_ZVS
. Unfortunately, most datasheets do not provide this
data. If the C
iss
(or Q
g_ZVS
) parameter is not available then
it will need to be measured. Please note that the input
capacitance is not linear (as shown Figure 62) and it needs
to be characterized for a given gate voltage clamp level.
Step 2 − Gate Drive Losses Calculation:
Gate drive losses are affected by the gate driver clamp
voltage. Gate driver clamp voltage selection depends on the
type of MOSFET used (threshold voltage versus channel
resistance). The total power losses (driving loses and
conduction losses) should be considered when selecting the
gate driver clamp voltage. Most of today’s MOSFETs for SR
systems feature low R
DS(on)
for 5 V V
GS
voltage. The
NCP43080 offers both a 5 V gate clamp and a 10 V gate
clamp for those MOSFET that require higher gate to source
voltage.
The total driving loss can be calculated using the selected
gate driver clamp voltage and the input capacitance of the
MOSFET:
P
DRV_total
+ V
CC
@ V
CLAMP
@ C
g_ZVS
@ f
SW
(eq. 9)
Where:
V
CC
is the NCP43080 supply voltage
V
CLAMP
is the driver clamp voltage
C
g_ZVS
is the gate to source capacitance of the
MOSFET in ZVS mode
f
sw
is the switching frequency of the target
application
The total driving power loss won’t only be dissipated in
the IC, but also in external resistances like the external gate
resistor (if used) and the MOSFET internal gate resistance
(Figure 44). Because NCP43080 features a clamped driver,
it’s high side portion can be modeled as a regular driver
switch with equivalent resistance and a series voltage
source. The low side driver switch resistance does not drop
immediately at turn−off, thus it is necessary to use an
equivalent value (R
DRV_SIN_EQ
) for calculations. This
method simplifies power losses calculations and still
provides acceptable accuracy. Internal driver power
dissipation can then be calculated using Equation 10:
NCP43080
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32
Figure 63. Equivalent Schematic of Gate Drive Circuitry
P
DRV_IC
+
1
2
@ C
g_ZVS
@ V
CLAMP
2
@ f
SW
@ ǒ
R
DRV_SINK_EQ
R
DRV_SINK_EQ
) R
G_EXT
) R
g_int
Ǔ) C
g_ZVS
@ V
CLAMP
@ f
SW
@
ǒ
V
CC
* V
CLAMP
Ǔ
)
1
2
@ C
g_ZVS
@ V
CLAMP
2
@ f
SW
@ ǒ
R
DRV_SOURCE_EQ
R
DRV_SOURCE_EQ
) R
G_EXT
) R
g_int
Ǔ
(eq. 10)
Where:
R
DRV_SINK_EQ
is the NCP43080x driver low side switch
equivalent resistance (0.5 W)
R
DRV_SOURCE_EQ
is the NCP43080x driver high side switch
equivalent resistance (1.2 W)
R
G_EXT
is the external gate resistor (if used)
R
g_int
is the internal gate resistance of the
MOSFET
Step 3 − IC Consumption Calculation:
In this step, power dissipation related to the internal IC
consumption is calculated. This power loss is given by the
I
CC
current and the IC supply voltage. The I
CC
current
depends on switching frequency and also on the selected min
t
ON
and t
OFF
periods because there is current flowing out
from the min t
ON
and t
OFF
pins. The most accurate method
for calculating these losses is to measure the I
CC
current
when C
DRV
= 0 nF and the IC is switching at the target
frequency with given MIN_TON and MIN_TOFF adjust
resistors. IC consumption losses can be calculated as:
P
CC
+ V
CC
@ I
CC
(eq. 11)
Step 4 − IC Die Temperature Arise Calculation:
The die temperature can be calculated now that the total
internal power losses have been determined (driver losses
plus internal IC consumption losses). The package thermal
resistance is specified in the maximum ratings table for a
35 mm thin copper layer with no extra copper plates on any
pin (i.e. just 0.5 mm trace to each pin with standard soldering
points are used).
The DIE temperature is calculated as:
T
DIE
+
ǒ
P
DRV_IC
) P
CC
Ǔ
@ R
qJ−A
) T
A
(eq. 12)
Where:
P
DRV_IC
is the IC driver internal power dissipation
P
CC
is the IC control internal power
dissipation
R
q
JA
is the thermal resistance from junction to
ambient
T
A
is the ambient temperature
NCP43080
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33
PRODUCT OPTIONS
OPN Package UVLO [V] DRV clamp [V] Pin 5 function Usage
NCP43080ADR2G SOIC8 4.5 4.7 NC
LLC, CCM flyback, DCM flyback, forward,
QR, QR with primary side CCM control
NCP43080AMTTWG WDFN8 4.5 4.7 NC
NCP43080DDR2G SOIC8 4.5 9.5 NC
NCP43080DMNTWG DFN8 4.5 9.5 NC
NCP43080DMTTWG WDFN8 4.5 9.5 NC
NCP43080QDR2G SOIC8 4.5 9.5 MAX_TON QR with forced CCM from secondary side
ORDERING INFORMATION
Device Package Package marking Packing Shipping
NCP43080ADR2G
SOIC8
43080A
SOIC−8
(Pb−Free)
2500 /Tape & Reel
NCP43080DDR2G 43080D
NCP43080QDR2G 43080Q
NCP43080AMTTWG
WDFN8
FA
WDFN−8
(Pb−Free)
3000 /Tape & Reel
NCP43080DMTTWG FD
NCP43080DMNTWG DFN8 43080D DFN−8
(Pb−Free)
4000 /Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

NCP43080DMNTWG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers SYNC-RECTIFER CONTROLLER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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