LTC6406
10
6406fc
SHDN (Pin 1/Pin 7): When SHDN is fl oating or directly
tied to V
+
, the LTC6406 is in the normal (active) operat-
ing mode. When the SHDN pin is connected to V
–
, the
LTC6406 enters into a low power shutdown state with
Hi-Z outputs.
V
+
, V
–
(Pins 2, 10, 11 and Pins 3, 9, 12/Pins 3, 6): Power
Supply Pins. It is critical that close attention be paid to
supply bypassing. For single supply applications it is
recommended that a high quality 0.1μF surface mount
ceramic bypass capacitor be placed between V
+
and V
–
with
direct short connections. In addition, V
–
should be tied
directly to a low impedance ground plane with minimal
routing. For dual (split) power supplies, it is recommended
that additional high quality, 0.1μF ceramic capacitors are
used to bypass V
+
to ground and V
–
to ground, again
with minimal routing. For driving large loads (<200Ω),
additional bypass capacitance may be needed for optimal
performance. Keep in mind that small geometry (e.g. 0603
or smaller) surface mount ceramic capacitors have a much
higher self resonant frequency than do leaded capacitors,
and perform best in high speed applications.
V
OCM
(Pin 4/Pin 2): Output Common Mode Reference
Voltage. The voltage on V
OCM
sets the output common
mode voltage level (which is defi ned as the average of the
voltages on the +OUT and –OUT pins). The V
OCM
voltage
is internally set by a resistive divider between the supplies,
developing a default voltage potential of 1.25V with a 3V
supply. The V
OCM
pin can be overdriven by an external
voltage capable of driving the 18kΩ Thevenin equivalent
impedance presented by the pin. The V
OCM
pin should be
bypassed with a high quality ceramic bypass capacitor of at
least 0.01μF, to minimize common mode noise from being
converted to differential noise by impedance mismatches
both externally and internally to the IC.
V
TIP
(Pin 5/NA): This pin can normally be left fl oating.
It determines which pair of input transistors (NPN or
PNP or both) is sensing the input signal. The V
TIP
pin is
set by an internal resistive divider between the supplies,
developing a default 1.55V voltage with a 3V supply. V
TIP
has a Thevenin equivalent resistance of approximately
15k and can be overdriven by an external voltage. The
V
TIP
pin should be bypassed with a high quality ceramic
bypass capacitor of at least 0.01μF. See the Applications
Information section for more details.
+OUT, –OUT (Pins 7, 14/Pins 4, 5): Unfi ltered Output
Pins. Besides driving the feedback network, each pin
can drive an additional 50Ω to ground with typical short-
circuit current limiting of ±55mA. Each amplifi er output
(QFN/MSOP)
TYPICAL PERFORMANCE CHARACTERISTICS
(MSOP Package)
PIN FUNCTIONS
Harmonic Distortion vs Frequency
Harmonic Distortion
vs Input Common Mode Voltage
Harmonic Distortion
vs Input Amplitude
FREQUENCY (MHz)
DISTORTION (dBc)
6406 G34
–30
–40
–50
–60
–70
–80
–90
–100
–110
10 10 100
V
S
= 3V
V
OCM
= V
ICM
= 1.25V
R
LOAD
= 800Ω
V
OUTDIFF
= 2V
P-P
SINGLE-ENDED INPUT
2ND, R
I
= R
F
= 150Ω
2ND, R
I
= R
F
= 500Ω
3RD, R
I
= R
F
= 150Ω
3RD, R
I
= R
F
= 500Ω
INPUT COMMON MODE VOLTAGE (V)
6406 G35
DISTORTION (dBc)
–40
–50
–60
–70
–80
–90
–100
0 3.02.52.01.51.00.5
2ND
3RD
V
S
= 3V
V
OCM
= 1.25V
f
IN
= 50MHz
R
LOAD
= 800Ω
R
I
= R
F
= 500Ω
V
OUTDIFF
= 2V
P-P
SINGLE-ENDED INPUT
INPUT AMPLITUDE (dBm)
6406 G36
DISTORTION (dBc)
–40
–50
–60
–70
–80
–90
–100
–4 1086420–2
V
S
= 3V
V
OCM
= V
ICM
=1.25V
f
IN
= 50MHz
R
LOAD
= 800Ω
R
I
= R
F
= 500Ω
SINGLE-ENDED INPUT
2ND
3RD
(0.4V
P-P
) (2V
P-P
)
