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LTC3633AEFE-3#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
LTC3633A-2/LTC3633A-3
13
3633a23fb
For more information www.linear.com/LTC3633A-2
APPLICATIONS INFORMATION
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. Note that the largest ripple
current occurs at the highest PV
IN
. Exceeding 60% of
I
OUT(MAX)
is not recommended. To guarantee that ripple
current does not exceed a specified maximum, the induc-
tance should be chosen according to:
L =
V
OUT
f • ∆ I
L(MAX)
1–
V
OUT
V
IN(MAX)
The inductor ripple current also must not be so large that
its valley current level exceeds the negative current limit,
which can be as small as –1.2A. If the negative current
limit is exceeded while the part is in the forced continu
-
ous mode of operation, V
OUT
can get charged up to above
its regulation level – until the inductor current no longer
exceeds the negative current limit. In such instances,
choose a larger inductor value to reduce the inductor
ripple current. The alternative is to reduce the inductor
ripple current by decreasing the R
T
resistor value which
will increase the switching frequency.
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire, leading to increased DCR
and copper loss.
Ferrite designs exhibit very low core loss and are pre
-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard”, which means
that
inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current, so it is important to ensure that
the core will not saturate.
Different core materials and shapes will change the size/cur
-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and
don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. Table 1 gives a
sampling of available surface mount inductors.
Table 1. Inductor Selection Table
INDUCTANCE
(µH)
DCR
(m
Ω)
MAX
CURRENT
(A)
DIMENSIONS
(mm)
HEIGHT
(mm)
Würth Electronik WE-HC 744312 Series
0.25
0.47
0.72
1.0
1.5
2.
5
3.
4
7.5
9.5
10.5
18
16
12
11
9
7 × 7.7 3.8
Vishay IHLP-2020BZ-01 Series
0.22
0.33
0.47
0.68
1
5.2
8.
2
8.8
12.4
20
15
12
11.5
10
7
5.2 × 5.5 2
Toko FDV0620 Series
0.20
0.47
1.0
4.5
8.
3
18.3
12.4
9.0
5.7
7 × 7.7 2.0
Coilcraft D01813H Series
0.33
0.56
1.2
4
10
17
10
7.7
5.3
6 ×
8.9 5.0
TDK RLF7030 Series
1.0
1.5
8.8
9.
6
6.4
6.1
6.9 × 7.3 3.2
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current is
recommended. The maximum RMS current is given by:
I
RMS
=I
OUT(MAX)
V
OUT
V
IN
− V
OUT
( )
V
IN
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
≅ I
OUT
/2. This simple worst case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further de-
rate the capacitor, or choose a capacitor rated at a higher
temperature than required.
LTC3633A-2/LTC3633A-3
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For more information www.linear.com/LTC3633A-2
APPLICATIONS INFORMATION
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
Even though the LTC3633A-2 design includes an over
-
voltage protection circuit, care must always be taken to
ensure input voltage transients do not pose an over
voltage
hazard to the part.
The
selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ∆V
OUT
, is
approximated by:
∆V
OUT
< ∆I
L
ESR +
1
8 • f • C
OUT
When using low-ESR ceramic capacitors, it is more useful
to choose the output capacitor value to fulfill a charge stor-
age requirement. During a load step, the output capacitor
must instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is
dependent on the compensation and the
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V
DROOP
, is
usually about 3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
C
OUT
≈
3 • ∆I
OUT
f • V
DROOP
Though this equation provides a good approximation, more
capacitance may be required depending on the duty cycle
and load step requirements. The actual V
DROOP
should be
verified by applying a load step to the output.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are available
in small case sizes. Their high ripple current, high voltage
rating and low ESR make them ideal for switching regulator
applications. However, due to the self-resonant and high-Q
characteristics of some types of ceramic capacitors, care
must be taken when these capacitors are used at the input.
When a ceramic capacitor is used at the input and the
power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the PV
IN
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at PV
IN
large enough to damage the part. For
a more detailed discussion, refer to Application Note 88.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac
-
teristics of all the ceramics for a given value and size.
INT
V
CC
Regulator Bypass Capacitor
An internal low dropout (LDO) regulator draws power
from the SV
IN
input and produces the 3.3V supply that
powers the internal bias circuitry and drives the gate of
the internal MOSFET switches. The INTV
CC
pin connects
to the output of this regulator and must have a minimum
of 1µF ceramic decoupling capacitance to ground. The
decoupling capacitor should have low impedance electrical
connections to the INTV
CC
and PGND pins to provide the
transient currents required by the LTC3633A-2. This sup-
ply is intended only to supply additional DC load currents
as desired and not intended to regulate large transient or
AC behavior
, as this may impact L
TC3633A-2 operation.
As long as the INTV
CC
rail is powered by SV
IN
, the regula-
tor control circuitry will operate, regardless of the PV
IN
voltages. Thus, the SV
IN
input can be powered from a
different supply voltage than either PV
IN1
or PV
IN2
. This
characteristic makes the LTC3633A-2/LTC3633A-3 very
flexible and easy to use in systems with multiple power
sources.
Operating from Multiple Power Sources
Channel 1 and channel 2 may be operated from separate
input power sources. In cases where one power source is
disconnected, the other regulator can continue to operate
provided that SV
IN
remain powered. This can be done with
a simple diode-OR circuit, as shown in Figure 2.
LTC3633A-2/LTC3633A-3
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For more information www.linear.com/LTC3633A-2
Figure 3. Setting the Output Voltage
Figure 2. Diode-OR Circuit
FB
R2
R1
C
F
3633a23 F02
V
OUT
SGND
LTC3633A-2
APPLICATIONS INFORMATION
Furthermore, as long as SV
IN
is powered, the LTC3633A-2/
LTC3633A-3 operates as a step-down regulator with PV
IN
voltages as low as 1.5V (subject to minimum off-time
constraints). However, at PV
IN
voltages less than 3V, in-
ternal on-time calculation errors increase, and controlled
on-time operation is not guaranteed. If this occurs, the
output voltages will remain in regulation, but the switch
-
ing
frequency of each channel may deviate from the
programmed frequency under these conditions and phase
lock between the two channels may be lost.
Boost Capacitor
The LTC3633A-2 uses a “bootstrap” circuit to create a
voltage rail above the applied input voltage PV
IN
. Specifi-
cally, a boost capacitor, C
BOOST
, is charged to a voltage
approximately equal to INTV
CC
each time the bottom power
MOSFET is turned on. The charge on this capacitor is then
used to supply the required transient current during the
remainder of the switching cycle. When the top MOSFET
is turned on, the BOOST pin voltage will be equal to ap
-
proximately PV
IN
+ 3.3V. For most applications, a 0.1µF
ceramic capacitor closely connected between the BOOST
and SW pins will provide adequate performance.
Output Voltage Programming
Each regulator’s output voltage is set by an external resis
-
tive divider according to the following equation:
V
OUT
= 0.6V 1+
R2
R1
The desired output voltage is set by appropriate selection
of resistors R1 and R2 as shown in Figure 3. Choosing
large values for R1 and R2 will result in improved zero-
load efficiency but may lead to undesirable noise coupling
or phase margin reduction due to stray capacitances
at the V
FB
node. Care should be taken to route the V
FB
trace away from any noise source, such as the SW trace.
To improve the frequency response of the main control
loop, a feedforward capacitor, C
F
, may be used as shown
in Figure 3.
Connecting the V
ON
pin to the output voltage makes the
on-time proportional the output voltage and allows the
internal on-time servo loop to lock the converter’s switching
frequency to the programmed value. If the output voltage
is outside the V
ON
sense range (0.6V – 6V for LTC3633A-2,
1.5V – 12V for LTC3633A-3), the output voltage will stay
in regulation, but the switching frequency may deviate
from the programmed frequency.
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3633A-2 can turn on the bottom power MOSFET,
trip the current comparator and turn the power MOSFET
back off. This time is typically 45ns. For the controlled
on-time architecture, the minimum off-time limit imposes
a maximum duty cycle of:
DC
(MAX)
= 1– f • t
OFF(MIN)
+2 • t
DEAD
( )
where f is the switching frequency, t
DEAD
is the nonoverlap
time, or “dead time” (typically 10ns) and t
OFF(MIN)
is the
minimum off-time. If the maximum duty cycle is surpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
V
IN(MIN)
=
V
OUT
1− f • t
OFF(MIN)
+2 • t
DEAD
( )
SUPPLY1
PV
IN1
PV
IN2
SV
IN
3633a23 F02
SUPPLY2
LTC3633A-2
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LTC3633AEFE-3#PBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 3A, 20Vin, 4MHz, Monolithic Synchronous Step-Down Regulator
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