4
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
NOTES:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
Symbol Parameter
71V124SA10 71V124SA12 71V124SA15
Unit
Min. Max. Min. Max. Min. Max.
READ CYCLE
t
RC
Read Cycle Time 10
____
12
____
15
____
ns
t
AA
Address Access Time
____
10
____
12
____
15 ns
t
ACS
Chip Select Access Time
____
10
____
12
____
15 ns
t
CLZ
(1)
Chip Select to Output in Low-Z 4
____
4
____
4
____
ns
t
CHZ
(1)
Chip Deselect to Output in High-Z 0 5 0 6 0 7 ns
t
OE
Output Enable to Output Valid
____
5
____
6
____
7ns
t
OLZ
(1)
Output Enable to Output in Low-Z 0
____
0
____
0
____
ns
t
OHZ
(1)
Output Disable to Output in High-Z 0 5 0 5 0 5 ns
t
OH
Output Hold from Address Change 4
____
4
____
4
____
ns
WRITE CYCLE
t
WC
Write Cycle Time 10
____
12
____
15
____
ns
t
AW
Address Valid to End-of-Write 7
____
8
____
10
____
ns
t
CW
Chip Select to End-of-Write 7
____
8
____
10
____
ns
t
AS
Address Set-up Time 0
____
0
____
0
____
ns
t
WP
Write Pulse Width 7
____
8
____
10
____
ns
t
WR
Write Recovery Time 0
____
0
____
0
____
ns
t
DW
Data Valid to End-of-Write 5
____
6
____
7
____
ns
t
DH
Data Hold Time 0
____
0
____
0
____
ns
t
OW
(2)
Output Active from End-of-Write 3
____
3
____
3
____
ns
t
WHZ
(2)
Write Enable to Output in High-Z 0 5 0 5 0 5 ns
3873 tbl 08
