RT9018A/B
10
DS9018A/B-07 September 2010www.richtek.com
Figure 3 (a). Minimum Footprint, θ
JA
= 75°C/W
Figure 3 (b). Copper Area = 10mm
2
, θ
JA
= 64°C/W
Figure 3 (c). Copper Area = 30mm
2
,
θ
JA
= 54°C/W
Figure 4. De-rating Curves
Figure 3. Thermal Resistance vs. Different Cooper Area
Layout Design
Figure 3 (d). Copper Area = 50mm
2
, θ
JA
= 51°C/W
Figure 3 (e). Copper Area = 70mm
2
, θ
JA
= 49°C/W
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
0 20 40 60 80 100 120 140
Ambient Temperature (°C)
Power Dissipation (W)
JEDEC 4-Layers PCB
70mm
2
50mm
2
30mm
2
10mm
2
Minimum Layout
Copper Area
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance θ
JA
. For RT9018A/B packages, the Figure 4
of de-rating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Layout Considerations
The thermal resistance θ
JA
of SOP-8 (Exposed Pad) is
determined by the package design and the PCB design.
However, the package design had been designed. If
possible, it’ s useful to increase thermal performance by
the PCB design. The thermal resistance θ
JA
can be
decreased by adding a copper under the exposed pad of
SOP-8 (Exposed Pad) package.
As shown in Figure 3, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard SOP-8
(Exposed Pad) pad (Figure 3.a), θ
JA
is 75°C/W. Adding
copper area of pad under the SOP-8 (Exposed Pad) Figure
3.b) reduces the θ
JA
to 64°C/W. Even further, increasing
the copper area of pad to 70mm
2
(Figure 3.e) reduces the
θ
JA
to 49°C/W.
following formula:
P
D (MAX)
= (125°C − 25°C) / (75°C/W) = 1.33W (SOP-8
Exposed Pad on the minimum layout)
