74LVC332 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 March 2013 3 of 14
NXP Semiconductors
74LVC332
Triple 3-input OR gate
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 C the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C the value of P
tot
derates linearly with 4.5 mW/K.
Table 2. Pin description
Symbol Pin Description
1A, 2A, 3A 1, 3, 9 data input
1B, 2B, 3B 2, 4, 10 data input
1C, 2C, 3C 13, 5, 11 data input
1Y, 2Y, 3Y 12, 6, 8 data output
GND 7 ground (0 V)
V
CC
14 supply voltage
Table 3. Function selection
[1]
Input Output
nA nB nC nY
LLLL
XXHH
XHXH
HXXH
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
I
IK
input clamping current V
I
< 0 50 - mA
V
I
input voltage
[1]
0.5 +5.5 V
I
OK
output clamping current V
O
> V
CC
or V
O
< 0 - 50 mA
V
O
output voltage
[2]
0.5 V
CC
+ 0.5 V
I
O
output current V
O
= 0 V to V
CC
- 50 mA
I
CC
supply current - 100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 60 +150 C
P
tot
total power dissipation T
amb
= 40 C to +85 C
[3]
-500 mW
