NCV51198PDR2G

NCP51198, NCV51198
www.onsemi.com
7
APPLICATIONS INFORMATION
General
The NCP/NCV51198 is a bus termination, linear
regulator designed to meet the JEDEC requirements for
DDR−I, DDR−II and DDR−III memory termination. The
NCP/NCV51198 is capable of sourcing and sinking current
while accurately tracking and regulating the V
TT
output
voltage equal to (V
DDQ
/ 2). The output stage has been
designed to maintain excellent load regulation and
preventing shoot−through. The NCP/NCV51198 uses two
distinct power rails to separate the analog circuitry from the
power output stage and decrease internal power dissipation.
Supply Voltage Inputs
For added flexibility, separate input pins (V
CC
and PV
CC
)
are provided for each required supply input. V
CC
is used to
supply all the internal control circuitry and PV
CC
is used
exclusively to provide the rail voltage for the output stage
used to create V
TT
. These pins have the capability to work
off separate supplies with the condition that V
CC
is always
greater than or equal to PV
CC
, and should always be used
with either a 1.8 V or 2.5 V rail. If the junction temperature
exceeds the thermal shutdown threshold, the part will enter
a shutdown state identical to the manual shutdown where
V
TT
is tri−stated and V
REF
remains active. Lower voltage
rails, such as 1.5 V can be used but will reduce the maximum
available output current.
Generation of Internal Voltage Reference
V
DDQ
is the input used to create the internal reference
voltage for regulating V
TT
. The reference voltage is
generated from a resistor divider of two internal 50 kW
resistors. This guarantees that V
TT
will precisely track
(V
DDQ
/ 2). The optimal implementation of the V
DDQ
input
pin is as a remote sense. This can be achieved by connecting
V
DDQ
directly to the 1.8 V rail at the DIMM memory
module instead of connecting it to PV
CC
. This ensures that
the reference voltage precisely tracks the DDR memory
power rail without introducing a large voltage drop due to
power traces. For DDR−II applications the V
DDQ
input will
be 1.8 V, which will create a (V
DDQ
/ 2) = 0.9 V termination
voltage at the V
TT
output.
V
REF
provides a buffered output of the internal reference
voltage (V
DDQ
/ 2). For improved performance, an output
bypass capacitor can be placed, close to the pin, to help
reduce any potential stray noise. A ceramic capacitor in the
range of 0.01 mF to 0.1 mF is recommended. The V
REF
output
remains active during the shutdown state and thermal
shutdown events for the suspend to RAM functionality.
Remote Voltage Feedback Sensing
The purpose of the V
TTS
sense pin is to provide improved
remote load regulation. In most motherboard applications,
the termination resistors will connect to V
TT
in a long plane.
If the output voltage was regulated only at the output of the
NCP/NCV51198, then any long traces will generate a
significant IR drop resulting in a sagging termination
voltage at one end of the bus than the other. The V
TTS
pin can
be used to improve performance by connecting it to the
middle of the bus. This will provide better power
distribution across the entire termination bus. If remote load
regulation is not used, then the V
TTS
pin must still be
connected to V
TT
. Care should be taken when a long V
TTS
trace is implemented in close proximity to the memory.
Noise pickup in the V
TTS
trace can cause problems with
precise regulation of V
TT
. A small 0.1 mF ceramic capacitor
placed next to the V
TTS
pin can help filter out any high
frequency noise and thereby keeping the V
TT
power rail in
spec.
Regulator Shutdown Function
The NCP/NCV51198 contains an active low enable pin
(/SS) that can be used for suspend to RAM functionality. In
this condition the V
TT
output will tri−state, with the V
REF
output remaining active in order to provide a constant
reference signal for the memory and chipset. During
shutdown, V
TT
should not be exposed to voltages that
exceed PV
CC
.
With the enable pin asserted low the quiescent current of
the NCP/NCV51198 will drop, however the V
DDQ
input pin
will always draw a constant current due to the integrated
100 kW impedance used for generating the internal
reference. Therefore, to calculate the total power loss in
shutdown, both currents need to be considered. The enable
pin also has an internal pull−up current. Therefore, to turn
the part on, the enable pin can either be connected to V
CC
or
left open.
Termination Voltage Output Regulation
V
TT
is the regulated output that is used to terminate the
bus resistors. It is capable of sourcing and sinking current
while regulating the output precisely to V
DDQ
/ 2. The
NCP/NCV51198 is designed to handle continuous currents
of up to ±1.5 A with excellent load regulation. If a transient
is expected to last above the maximum continuous current
rating for a significant amount of time, then the bulk output
capacitor should be sized large enough to prevent an
excessive voltage drop.
Thermal Shutdown with Hysteresis
If the NCP/NCV51198 is to operate in elevated
temperatures for long durations, care should be taken to
ensure that the maximum operating junction temperature is
not exceeded. To guarantee safe operation, the
NCP/NCV51198 provides on−chip thermal shutdown
protection. When the chip junction temperature exceeds
165°C (typical) the part will shutdown. When the junction
temperature falls back to 155°C (typical) the device resumes
normal operation. If the junction temperature exceeds the
thermal shutdown threshold, V
TT
will tri−state until the part
returns below the temperature hysteresis trip−point.
NCP51198, NCV51198
www.onsemi.com
8
Table 1. ORDERING INFORMATION
Device Marking Package Shipping
NCP51198PDR2G 51198
SOIC−8
(Pb-Free)
2500 / Tape & Reel
NCV51198PDR2G* V51198
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
NCP51198, NCV51198
www.onsemi.com
9
PACKAGE DIMENSIONS
SOIC8−NB EP
CASE 751BU
ISSUE B
SEATING
PLANE
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.10mm IN EXCESS OF MAXIMUM MATERIAL
CONDITION.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH,
PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15mm PER SIDE. DIMENSION E DOES
NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25mm PER
SIDE. DIMENSIONS D AND E ARE DETERMINED AT
DATUM F.
5. DIMENSIONS A AND B ARE TO BE DETERMINED
AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. TAB CONTOUR MAY VARY MINIMALLY TO INCLUDE
TOOLING FEATURES.
A
DIM MIN MAX
MILLIMETERS
G 1.55 3.07
A 1.35 1.75
b 0.31 0.51
e 1.27 BSC
A1 −−− 0.10
b1 0.28 0.48
h 0.25 0.50
C
M
0.25
DIMENSION: MILLIMETERS
SOLDERING FOOTPRINT
L2 0.25 BSC
A
TOP VIEW
C0.20
A-B D
C0.10
NOTE 5
C0.10
b8X
B
C
8X
SIDE VIEW
END VIEW
DETAIL A
7.00
8X
1.52
8X
0.60
1.27
PITCH
RECOMMENDED
1
L
F
SEATING
PLANE
DETAIL A
D
L2
A1
C
NOTE 6
1
4
5
8
C0.10 A-B
NOTE 5
e
NOTE 7
F
G
BOTTOM VIEW
3.30
3.10
c 0.17 0.25
L 0.40 1.27
2X
NOTE 4
2X 4 TIPS
C0.10
2X
NOTE 4
h
c1 0.17 0.23
F 1.55 3.07
D 4.90 BSC
E 6.00 BSC
E1 3.90 BSC
E E1
D
D
B
SECTION B−B
c
c1
b
b1
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
NCP51198/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative

NCV51198PDR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Linear Voltage Regulators 1.5ADDR MEMORY TERML REG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet