ZL30109 Data Sheet
List of Figures
4
Zarlink Semiconductor Inc.
Figure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2 - Pin Connections (64 pin TQFP, please see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3 - Reference Monitor Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4 - Behaviour of the Dis/Re-qualify Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5 - DS1 Mode Out-of-Range Limits (OOR_SEL=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6 - E1 Mode Out-of-Range Limits (OOR_SEL=1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7 - Timing Diagram of Hitless Reference Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8 - Timing Diagram of Hitless Mode Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9 - DPLL Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10 - Mode Switching in Normal Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11 - Reference Switching in Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 12 - Clock Oscillator Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 13 - Crystal Oscillator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 14 - Power-Up Reset Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 15 - Timing Parameter Measurement Voltage Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 16 - Input to Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 17 - Output Timing Referenced to F8/F32o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 18 - SONET/SDH Output Timing Referenced to F8/F32o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
ZL30109 Data Sheet
5
Zarlink Semiconductor Inc.
1.0 Change Summary
Changes from November 2005 Issue to April 2010 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from July 2005 Issue to November 2005 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from November 2004 Issue to July 2005 Issue. Page, section, figure and table numbers refer to this
current issue.
Page Item Change
1 Ordering Information Box Leaded part number ZL30109QDG has been obsoleted and
replaced by ZL30109QDG1.
Page Item Change
1 Features Added description for hitless reference switching.
23 Section 6.1 Removed power supply decoupling circuit and included
reference to synchronizer power supply decoupling application
note.
Page Item Change
8RST
pin Specified clock and frame pulse outputs forced to high
impedance.
10 REF0 pin Specified seven possible reference input frequencies.
27 Table “DC Electrical Characteristics*“ Corrected Schmitt trigger levels.
33 Table “Performance Characteristics* -
Functional“
Gave more detail on Lock Time conditions.
ZL30109 Data Sheet
6
Zarlink Semiconductor Inc.
2.0 Physical Description
2.1 Pin Connections
Figure 2 - Pin Connections (64 pin TQFP, please see Note 1)
Note 1: The ZL30109 uses the TQFP shown in the package outline designated with the suffix QD, the ZL30109
does not use the e-Pad TQFP.
ZL30109
3436384042444648
64
62
60
58
56
52
50
54
161412108642
OSCo
NC
GND
OUT_SEL
C1.5o
MODE_SEL1
V
DD
AV
DD
IC
NC
RST
NC
AGND
F4/F65o
V
DD
REF1
NC
IC
C8/C32o
F2ko
C2o
AGND
AV
DD
C19o
F8/F32o
C4/C65o
REF_SEL
18
20
22
24
26
30
32
28
C16o
F16o
TIE_CLR
OOR_SEL
IC
OSCi
AV
DD
AV
DD
AV
DD
AV
CORE
AGND
AGND
AGND
NC
NC
IC
IC
MODE_SEL0
NC
BW_SEL
REF0
V
CORE
LOCK
HMS
TRST
GND
TDO
TMS
HOLDOVER
IC
TCK
TDI
V
CORE
AV
CORE
GND
REF_FAIL0
REF_FAIL1

ZL30109QDG1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Clock Generators & Support Products Pb Free DS1/E1 SYS. SYNCH WITH 19.44MHZ
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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