LT3420/LT3420-1
13
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CAPACITOR SELECTION
The V
BAT
and V
CC
decoupling capacitors should be multi-
layer ceramic type with X5R or X7R dielectric. This insures
adequate decoupling across wide ambient temperature
ranges. A good quality ceramic capacitor is also recom-
mended for the timing capacitor on the C
T
pin. Avoid Y5V
or Z5U dielectrics.
Selectively Disabling the LT3420/LT3420-1
The LT3420/LT3420-1 can be disabled at any time, even
during the charge phase. This may be useful when a digital
camera enters a sensitive data acquisition phase. Figure 8
illustrates this feature. Midway through the charge cycle,
the CHARGE pin is brought low, which disables the part.
After the sensitive data operation is complete, the CHARGE
pin is brought high and the charging operation continues.
Measuring Efficiency
Measuring the efficiency of a circuit designed to charge
large capacitive loads is a difficult issue, particularly with
photoflash capacitors. The ideal way to measure the
efficiency of a capacitor charging circuit would be to find
the energy delivered to the output capacitor (0.5 • C • V
2
)
and divide it by the total input energy. This method does
not work well here because photoflash capacitors are far
from ideal. Among other things, they have relatively high
leakage currents, large amounts of dielectric absorption,
and significant voltage coefficients. A much more accu-
rate, and easier, method is to measure the efficiency as a
function of the output voltage. In place of the photoflash
capacitor, use a smaller, high quality capacitor, reducing
errors associated with the non-ideal photoflash capacitor.
Using an adjustable load, the output voltage can be set
anywhere between ground and the maximum output
voltage. The efficiency is measured as the output power
(V
OUT
• I
OUT
) divided by the input power (V
IN
• I
IN
). This
method also provides a good means to compare various
charging circuits since it removes the variability of the
photoflash capacitor from the measurement. The total
efficiency of the circuit, charging an ideal capacitor, would
be the time average of the given efficiency curve, over time
as V
OUT
changes.
Adjustable Input Current
With many types of modern batteries, the maximum
allowable current that can be drawn from the battery is
limited. This is generally accomplished by active circuitry
or a polyfuse. Different parts of a digital camera may
require high currents during certain phases of operation
and very little at other times. A photoflash charging circuit
should be able to adapt to these varying currents by
drawing more current when the rest of the camera is
drawing less, and vice-versa. This helps to reduce the
charge time of the photoflash capacitor, while avoiding the
APPLICATIO S I FOR ATIO
WUUU
Figure 8. Halting the Charge Cycle at Any Time
V
OUT
50V/DIV
CHARGE
NO
CHARGE
0.5s/DIV
3420 F08
5V/
DIV
V
CHARGE
14
LT3420/LT3420-1
3420fb
risk of drawing too much current from the battery. The
input current to the LT3420/LT3420-1 circuit can be
adjusted by driving the CHARGE pin with a PWM (pulse
width modulation) signal. The microprocessor can adjust
the duty cycle of the PWM signal to achieve the desired
level of input current. Many schemes exist to achieve this
function. Once the target output voltage is reached, the
PWM signal should be halted to avoid overcharging the
photoflash capacitor, since the signal at the CHARGE pin
overrides the refresh timer.
A simple method to achieve adjustable input current is
shown in Figure 9. The PWM signal has a frequency of
1kHz. When ON is logic high, the circuit is enabled and the
CHARGE pin is driven by the PWM signal. When the target
output voltage is reached, DONE goes high while CHARGE
is also high. The output of A1 goes high, which forces
CHARGE high regardless of the PWM signal. The part is
now in the Refresh mode. Once the refresh period is over,
the DONE pin goes low, allowing the PWM signal to drive
the CHARGE pin once again. This function can be easily
implemented in a microcontroller. Figure 10 shows the
input current for the LT3420 and LT3420-1 as the duty
cycle of the PWM signal is varied.
APPLICATIO S I FOR ATIO
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Figure 9. Simple Logic for Adjustable Input Current
Figure 10. Input Current as Duty Cycle is Varied
A1
A3
3420 F09
A2
TO
LT3420
CIRCUIT
CHARGE
DONE
ON
1kHz PWM
SIGNAL
INPUT CURRENT (mA)
DUTY CYCLE (%)
90
3420 F10
10
800
LT3420
LT3420-1
0
30 50 70
400
200
600
LT3420/LT3420-1
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BOARD LAYOUT
The high voltage operation of the LT3420/LT3420-1
demands careful attention to board layout. You will not
get advertised performance with careless layout. Fig-
ures 11 and 12 show the recommended component
placement. Keep the area for the high voltage end of the
secondary as small as possible. Note the larger than
minimum spacing for all high voltage nodes. This is
necessary to meet the breakdown specifications for the
circuit board. If the Photoflash capacitor is placed far
from the LT3420/LT3420-1 circuit, place a small (20nF-
50nF) ceramic capacitor with sufficient voltage rating
close to the part. This insures adequate bypassing.
Remember that LETHAL VOLTAGES ARE PRESENT in
this circuit. Use caution when working with the circuit.
Figure 11. Suggested Layout (MS10 Package)
3420 F11
CHARGE DONE
C3
C1
C2
+
R2
R1
D1A
D1B
PHOTOFLASH
CAPACITOR
V
OUT
V
BAT
V
CC
GND
T1
APPLICATIO S I FOR ATIO
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Figure 12. Suggested Layout (DD Package)
3420 F12
CHARGE DONE
C3
C1
C2
+
R2
R1
D1A
D1B
PHOTOFLASH
CAPACITOR
V
OUT
V
BAT
V
CC
GND
T1

LT3420EMS-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 700mA Photoflash Capacitor Charger
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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