EZAIRO 7111 HYBRID
www.onsemi.com
7
Table 3. RECOMMENDED MINIMUM VDDC LEVELS
Operating Frequency (MHz) Minimum VDDC Voltage (V)
1.28 to 5.12 0.73
5.13 to 10.24 0.82 (Note 6)
10.25 to 12.80 0.85
12.81 to 15.36 0.88 (Note 7)
6. The default VDDC calibration entry, stored in the manufacturing area of the EEPROM at address 0x0064, should be used for operation at
0.82 V.
7. An alternate VDDC calibration entry, stored in the manufacturing area of the EEPROM at address 0x00E8, should be used for operation at
0.88 V.
PACKAGING AND MANUFACTURING
• Ultra−miniature form factor: suitable for all hearing aid
styles including CIC, ITE, RITE, BTE, and mini−BTE.
• Can easily be soldered by hand.
• Re−flowable: the Ezairo 7111 hybrid is re−flowable
onto FR4 and other substrates.
• Bump metallization: SAC305 (Sn96.5/Ag3.0/Cu0.5)
• RoHS compliant: the Ezairo 7111 hybrid complies with
the RoHS directive.
SYSTEM DIAGRAM
Figure 1 is a simplified diagram of the hybrid system that
shows the major internal functional blocks and possible
external peripherals.
Figure 1. Ezairo 7111 Hybrid System Diagram
IOC (Output)
Zero-bias
Receiver
DAI
Telecoil
Microphones
Fitting Connector
Volume Control
Switches
IP
Protection
VCO
On-Chip Peripherals
Power
Management
Interrupt
Controller
PLL
Timers
GPIO
LSAD
UART
Interfaces
EEPROM
Battery
System
Memories
I
2
C
SPI
PCM
Preamplifier
Down-
sampling
MUX
Signal
Detection Unit
HEAR
Configurable Accelerator
CFX
24-bit DSP
Filter Engine
Programmable Filters
Up-
sampling
Output
Driver
ARM
Cortex
-M3
Processor
IOC (Input)
Pushbuttons/
A/D
A/D
A/D
A/D
MUX
Advanced CODECs Error Correction Blocks
I
2
C PCM SPI GPIO
