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ADT7320UCPZ-R2

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
Data Sheet ADT7320
Rev. 0 | Page 15 of 24
TEMPERATURE VALUE REGISTER
The temperature value register stores the temperature measured
by the internal temperature sensor. The temperature is stored in
a 16-bit, twos complement format. The temperature is read back
from the temperature value register (Register Address 0x02) as a
16-bit value.
Bit 2, Bit 1, and Bit 0 are event alarm flags for T
CRIT
, T
HIGH
, and
T
LOW
, respectively. When the ADC is configured to convert the
temperature to a 16-bit digital value, Bit 2, Bit 1, and Bit 0 are
no longer used as flag bits and are, instead, used as the LSB bits for
the extended digital value.
ID REGISTER
This 8-bit read-only register (Register Address 0x03) stores
the manufacturer ID in Bit 7 to Bit 3 and the silicon revision in
Bit 2 to Bit 0. The default setting for the ID register is 0xC3.
T
CRIT
SETPOINT REGISTER
The 16-bit T
CRIT
setpoint register (Register Address 0x04) stores
the critical overtemperature limit value. A critical overtemperature
event occurs when the temperature value stored in the temperature
value register exceeds the value stored in this register. The CT
pin is activated if a critical overtemperature event occurs. The
temperature is stored in twos complement format with the MSB
being the temperature sign bit.
The default setting for the T
CRIT
setpoint is 147°C.
Table 9. Temperature Value Register (Register Address 0x02)
Bit(s) Default Value Type Name Description
[0] 0 R T
LOW
flag/LSB0 Flags a T
LOW
event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value is below T
LOW
, this bit is set to 1.
Contains Least Significant Bit 0 of the 15-bit temperature value when the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[1] 0 R T
HIGH
flag/LSB1 Flags a T
HIGH
event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value is above T
HIGH
, this bit is set to 1.
Contains Least Significant Bit 1 of the 15-bit temperature value when the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[2] 0 R T
CRIT
flag/LSB2 Flags a T
CRIT
event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value exceeds T
CRIT
, this bit is set to 1.
Contains the Least Significant Bit 2 of the 15-bit temperature value if the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[7:3] 00000 R Temp Temperature value in twos complement format.
[14:8] 0000000 R Temp Temperature value in twos complement format.
15 0 R Sign Sign bit; indicates if the temperature value is negative or positive.
Table 10. ID Register (Register Address 0x03)
Bit(s) Default Value Type Name Description
[2:0] 011 R Revision ID Contains the silicon revision identification number.
[7:3]
11000
R
Manufacturer ID
Contains the manufacturer identification number.
Table 11. T
CRIT
Setpoint Register (Register Address 0x04)
Bit(s) Default Value Type Name Description
[15:0] 0x4980 R/
W
T
CRIT
16-bit critical overtemperature limit, stored in twos complement format.
ADT7320 Data Sheet
Rev. 0 | Page 16 of 24
T
HYST
SETPOINT REGISTER
The 8-bit T
HYST
setpoint register (Register Address 0x05) stores
the temperature hysteresis value for the T
HIGH
, T
LOW
, and T
CRIT
temperature limits. The temperature hysteresis value is stored in
straight binary format using the four LSBs. Increments are possible
in steps of 1°C from 0°C to 15°C. The value in this register is
subtracted from the T
HIGH
and T
CRIT
values and added to the
T
LOW
value to implement hysteresis.
The default setting for the T
HYST
setpoint is 5°C.
T
HIGH
SETPOINT REGISTER
The 16-bit T
HIGH
setpoint register (Register Address 0x06) stores
the overtemperature limit value. An overtemperature event occurs
when the temperature value stored in the temperature value
register exceeds the value stored in this register. The INT pin is
activated if an overtemperature event occurs. The temperature
is stored in twos complement format with the most significant
bit being the temperature sign bit.
The default setting for the T
HIGH
setpoint is 64°C.
T
LOW
SETPOINT REGISTER
The 16-bit T
LOW
setpoint register (Register Address 0x07) stores
the undertemperature limit value. An undertemperature event
occurs when the temperature value stored in the temperature
value register is less than the value stored in this register. The
INT pin is activated if an undertemperature event occurs. The
temperature is stored in twos complement format with the MSB
being the temperature sign bit.
The default setting for the T
LOW
setpoint is 10°C.
Table 12. T
HYST
Setpoint Register (Register Address 0x05)
Bit(s) Default Value Type Name Description
[3:0]
0101
R/W
T
HYST
Hysteresis value, from 0°C to 15°C. Stored in straight binary format. The default setting is 5°C.
[7:4]
0000
R/W
N/A N/A = not applicable. Not used.
Table 13. T
HIGH
Setpoint Register (Register Address 0x06)
Bit(s) Default Value Type Name Description
[15:0] 0x2000
R/W
T
HIGH
16-bit overtemperature limit, stored in twos complement format.
Table 14. T
LOW
Setpoint Register (Register Address 0x07)
Bit(s) Default Value Type Name Description
[15:0] 0x0500
R/W
T
LOW
16-bit undertemperature limit, stored in twos complement format.
Data Sheet ADT7320
Rev. 0 | Page 17 of 24
SERIAL INTERFACE
ADT7320
GND
SCLK
DOUT
DIN
CT
INT
V
DD
10kΩ10kΩ
PULL-UP
TO V
DD
0.1µF
MICROCONTROLLER
V
DD
CS
09012-014
Figure 14. Typical SPI Interface Connection
The ADT7320 has a 4-wire serial peripheral interface (SPI). The
interface has a data input pin (DIN) for writing data to the device, a
data output pin (DOUT) for reading data back from the device,
and a serial data clock pin (SCLK) for clocking data into and out of
the device. A chip select pin (
CS
) enables or disables the serial
interface.
CS
is required for correct operation of the interface.
Data is clocked out of the on the falling edge of SCLK,
and data is clocked into the device on the rising edge of SCLK.
ADT7320
SPI COMMAND BYTE
All data transactions on the bus begin with the master taking
CS
from high to low and sending out the command byte. The
command byte indicates to the whether the transaction
is a read or a write and provides the address of the register for the
data transfer. shows the command byte.
ADT7320
Tabl e 15
Table 15. Command Byte
C7 C6 C5 C4 C3 C2 C1 C0
0
R/W
Register address 0 0 0
Bit C7, Bit C2, Bit C1, and Bit C0 of the command byte must all be
set to 0 to successfully begin a bus transaction. The SPI interface
does not work correctly if a 1 is written into any of these bits.
Bit C6 is the read/
write
bit; 1 indicates a read, and 0 indicates
a write.
Bits[C5:C3] contain the target register address. One register can
be read from or written to per bus transaction.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

ADT7320UCPZ-R2

Mfr. #:
Buy ADT7320UCPZ-R2
Manufacturer:
Analog Devices Inc.
Description:
Board Mount Temperature Sensors .25 Deg C Accurate 16-Bit Digital SPI
Lifecycle:
New from this manufacturer.
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