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ADT7320UCPZ-R2

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
Data Sheet ADT7320
Rev. 0 | Page 3 of 24
SPECIFICATIONS
T
A
= −40°C to +125°C, V
DD
= 2.7 V to 5.5 V, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE SENSOR AND ADC
Accuracy
1
0.0017 ±0.20
2
°C T
A
= −10°C to +85°C, V
DD
= 3.0 V
±0.25 °C T
A
= −20°C to +105°C, V
DD
= 2.7 V to 3.3 V
±0.31 °C T
A
= −40°C to +105°C, V
DD
= 3.0 V
±0.35 °C T
A
= −40°C to +105°C, V
DD
= 2.7 V to 3.3 V
±0.50 °C T
A
= −40°C to +125°C, V
DD
= 2.7 V to 3.3 V
±0.50
3
°C T
A
= −10°C to +105°C, V
DD
= 4.5 V to 5.5 V
±0.66 °C T
A
= −40°C to +125°C, V
DD
= 4.5 V to 5.5 V
−0.85 °C T
A
= +150°C, V
DD
= 4.5 V to 5.5 V
−1.0 °C T
A
= +150°C, V
DD
= 2.7 V to 3.3 V
ADC Resolution 13 Bits Twos complement temperature value of sign bit plus
12 ADC bits (power-up default resolution)
16 Bits Twos complement temperature value of sign bit plus
15 ADC bits (Bit 7 = 1 in the configuration register)
Temperature Resolution
13-Bit 0.0625 °C 13-bit resolution (sign + 12 bits)
16-Bit 0.0078 °C 16-bit resolution (sign + 15 bits)
Temperature Conversion Time 240 ms Continuous conversion and one-shot conversion mode
Fast Temperature Conversion Time 6 ms First conversion on power-up only
1 SPS Conversion Time 60 ms Conversion time for 1 SPS mode
Temperature Hysteresis
4
±0.002 °C Temperature cycle = 25°C to 125°C and back to 25°C
Repeatability
5
±0.015 °C T
A
= 25°C
Drift
6
0.0073 °C 500 hour stress test at 150°C with V
DD
= 5.0 V
DC PSRR 0.1 °C/V T
A
= 25°C
DIGITAL OUTPUTS (CT, INT ), OPEN DRAIN
High Output Leakage Current, I
OH
0.1 5 µA CT and INT pins pulled up to 5.5 V
Output Low Voltage, V
OL
0.4 V I
OL
= 3 mA at 5.5 V, I
OL
= 1 mA at 3.3 V
Output High Voltage, V
OH
0.7 × V
DD
V
Output Capacitance, C
OUT
2 pF
DIGITAL INPUTS (DIN, SCLK,
CS
)
Input Current ±1 µA V
IN
= 0 V to V
DD
Input Low Voltage, V
IL
0.4 V
Input High Voltage, V
IH
0.7 × V
DD
V
Pin Capacitance 5 10 pF
DIGITAL OUTPUT (DOUT)
Output High Voltage, V
OH
V
DD
− 0.3 V I
SOURCE
= I
SINK
= 200 µA
Output Low Voltage, V
OL
0.4 V I
OL
= 200 µA
Output Capacitance, C
OUT
50 pF
POWER REQUIREMENTS
Supply Voltage 2.7 5.5 V
Supply Current Peak current while converting, SPI interface inactive
At 3.3 V 210 265 µA
At 5.5 V 250 300 µA
1 SPS Current 1 SPS mode, T
A
= 25°C
At 3.3 V 46 µA V
DD
= 3.3 V
At 5.5 V 65 µA V
DD
= 5.5 V
ADT7320 Data Sheet
Rev. 0 | Page 4 of 24
Parameter Min Typ Max Unit Test Conditions/Comments
Shutdown Current Supply current in shutdown mode
At 3.3 V 2.0 15 µA
At 5.5 V 5.2 25 µA
Power Dissipation, Normal Mode 700 µW V
DD
= 3.3 V, normal mode at 25°C
Power Dissipation, 1 SPS Mode
150
µW
Power dissipated for V
DD
= 3.3 V, T
A
= 25°C
1
Accuracy specification includes repeatability.
2
The equivalent 3 σ limits are ±0.15°C. This 3 σ specification is provided to enable comparison with other vendors who use these limits.
3
For higher accuracy at 5 V operation, contact Analog Devices, Inc.
4
Temperature hysteresis does not include repeatability.
5
Based on a floating average of 10 readings.
6
Drift includes solder heat resistance and lifetime test performed as per JEDEC Standard JESD22-A108.
SPI TIMING SPECIFICATIONS
T
A
= −40°C to +150°C, V
DD
= 2.7 V to 5.5 V, unless otherwise noted. All input signals are specified with rise time (t
R
) = fall time (t
F
) = 5 ns
(10% to 90% of V
DD
) and timed from a voltage level of 1.6 V.
Table 2.
Parameter
1, 2
Limit at T
MIN
, T
MAX
Unit Descriptions
t
1
0 ns min
CS
falling edge to SCLK active edge setup time
t
2
100 ns min SCLK high pulse width
t
3
100 ns min SCLK low pulse width
t
4
30
ns min
Data setup time prior to SCLK rising edge
t
5
25 ns min Data hold time after SCLK rising edge
t
6
5 ns min Data access time after SCLK falling edge
60 ns max V
DD
= 4.5 V to 5.5 V
80 ns max V
DD
= 2.7 V to 3.6 V
t
7
3
10 ns min Bus relinquish time after
CS
inactive edge
80 ns max Bus relinquish time after
CS
inactive edge
t
8
0 ns min SCLK inactive edge to
CS
rising edge hold time
t
9
0 ns min
CS
falling edge to DOUT active time
60 ns max V
DD
= 4.5 V to 5.5 V
80 ns max V
DD
= 2.7 V to 3.6 V
t
10
10
ns min
SCLK inactive edge to DOUT low
1
Sample tested during initial release to ensure compliance.
2
See Figure 2.
3
This means that the times quoted in the timing characteristics in Table 2 are the true bus relinquish times of the part and, as such, are independent of external bus
loading capacitances.
CS
SCLK
DIN
DOUT
t
1
1
8
76
MSB LSB
2 3
MSB
LSB
9 10 23 24
t
2
t
4
t
5
t
3
t
6
t
7
t
8
t
9
t
10
09012-002
Figure 2. Detailed SPI Timing Diagram
Data Sheet ADT7320
Rev. 0 | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
V
DD
to GND −0.3 V to +7 V
DIN Input Voltage to GND −0.3 V to V
DD
+ 0.3 V
DOUT Voltage to GND −0.3 V to V
DD
+ 0.3 V
SCLK Input Voltage to GND −0.3 V to V
DD
+ 0.3 V
CS Input Voltage to GND
−0.3 V to V
DD
+ 0.3 V
CT and INT Output Voltage to GND −0.3 V to V
DD
+ 0.3 V
ESD Rating (Human Body Model) 2.0 kV
Operating Temperature Range
1
−40°C to +150°C
Storage Temperature Range −65°C to +160°C
Maximum Junction Temperature, T
JMAX
150°C
Power Dissipation
2
16-Lead LFCSP
3
W
MAX
= (T
JMAX
− T
A
)/θ
JA
Thermal Impedance
4
θ
JA
, Junction-to-Ambient (Still Air) 37°C/W
θ
JC
, Junction-to-Case 33°C/W
IR Reflow Soldering 220°C
Peak Temperature (RoHS-Compliant
Package)
260°C (0°C/−5°C)
Time at Peak Temperature 20 sec to 40 sec
Ramp-Up Rate 3°C/sec maximum
Ramp-Down Rate −6°C/sec maximum
Time from 25°C to Peak Temperature 8 minutes maximum
1
Sustained operation above 125°C results in a shorter product lifetime. For
more information, contact an Analog Devices, Inc., sales representative.
2
Values relate to package being used on a standard 2-layer PCB. This gives a
worst-case θ
JA
and θ
JC
.
3
T
A
= ambient temperature.
4
Junction-to-case resistance is applicable to components featuring a
preferential flow direction, for example, components mounted on a heat
sink. Junction-to-ambient resistance is more useful for air cooled, PCB-
mounted components.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

ADT7320UCPZ-R2

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Buy ADT7320UCPZ-R2
Manufacturer:
Analog Devices Inc.
Description:
Board Mount Temperature Sensors .25 Deg C Accurate 16-Bit Digital SPI
Lifecycle:
New from this manufacturer.
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