MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
Freescale Semiconductor 31
USB
The following figure shows the timing with internal clock.
Figure 22. AC Timing (Internal Clock) Diagram
11 USB
11.1 USB Controller
This section provides the AC and DC electrical specifications for the USB (ULPI) interface.
11.1.1 USB DC Electrical Characteristics
The following table provides the DC electrical characteristics for the USB interface.
11.1.2 USB AC Electrical Specifications
The following table describes the general timing parameters of the USB interface.
Table 30. USB DC Electrical Characteristics
Parameter Symbol Min Max Unit
High-level input voltage V
IH
2.0 OV
DD
+0.3 V
Low-level input voltage V
IL
–0.3 0.8 V
Input current I
IN
—±5 A
High-level output voltage, I
OH
= –100 AV
OH
OV
DD
–0.2 V
Low-level output voltage, I
OL
= 100 AV
OL
—0.2V
Table 31. USB General Timing Parameters
Parameter Symbol
1
Min Max Unit Note
USB clock cycle time t
USCK
15 ns
Input setup to USB clock—all inputs t
USIVKH
4—ns
input hold to USB clock—all inputs t
USIXKH
1—ns
USB clock to output valid—all outputs (except
USBDR_STP_USBDR_STP)
t
USKHOV
—7ns
Serial CLK (Output)
t
HIIXKH
t
HIKHOV
Input Signals:
(See Note)
Output Signals:
(See Note)
t
HIIVKH
t
HIKHOX
Note: The clock edge is selectable.
MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
32 Freescale Semiconductor
USB
The following figures provide the AC test load and signals for the USB, respectively.
Figure 23. USB AC Test Load
Figure 24. USB Signals
USB clock to output valid—USBDR_STP t
USKHOV
—7.5ns
Output hold from USB clock—all outputs t
USKHOX
2—ns
Note:
1. The symbols used for timing specifications follow the pattern of t
(first two letters of functional block)(signal)(state)(reference)(state)
for
inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
USIXKH
symbolizes USB timing
(USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, t
USKHOX
symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
Table 31. USB General Timing Parameters (continued)
Parameter Symbol
1
Min Max Unit Note
Output
Z
0
= 50
OV
DD
/2
R
L
= 50
Output Signals
t
USKHOV
USBDR_CLK
Input Signals
t
USIXKH
t
USIVKH
t
USKHOX
MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
Freescale Semiconductor 33
DUART
12 DUART
This section describes the DC and AC electrical specifications for the DUART interface of the MPC8306S.
12.1 DUART DC Electrical Characteristics
The following table provides the DC electrical characteristics for the DUART interface of the MPC8306S.
12.2 DUART AC Electrical Specifications
The following table provides the AC timing parameters for the DUART interface of the MPC8306S.
Table 32. DUART DC Electrical Characteristics
Parameter Symbol Min Max Unit
High-level input voltage V
IH
2OV
DD
+0.3 V
Low-level input voltage OV
DD
V
IL
–0.3 0.8 V
High-level output voltage, I
OH
= –100 AV
OH
OV
DD
–0.2 V
Low-level output voltage, I
OL
= 100 AV
OL
—0.2V
Input current (0 V V
IN
OV
DD
)
1
I
IN
—±5A
Note:
1. Note that the symbol V
IN
, in this case, represents the OV
IN
symbol referenced in Table 1 and Table 2.
Table 33. DUART AC Timing Specifications
Parameter Value Unit Note
Minimum baud rate 256 baud
Maximum baud rate >1,000,000 baud 1
Oversample rate 16 2
Notes:
1. Actual attainable baud rate is limited by the latency of interrupt processing.
2. The middle of a start bit is detected as the 8
th
sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are
sampled each 16
th
sample.

MPC8306SVMADDCA

Mfr. #:
Manufacturer:
NXP / Freescale
Description:
Microprocessors - MPU E300 MP 266
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