Data Sheet ADF4360-4
Rev. C | Page 17 of 24
Hardware Power-Up/Power-Down
If the ADF4360-4 is powered down via the hardware (using the
CE pin) and powered up again without any change to the N
counter register during power-down, the device locks at the
correct frequency because it is already in the correct frequency
band. The lock time depends on the value of capacitance on the
C
N
pin, which is <5 ms for 10 µF capacitance. The smaller ca-
pacitance of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while the device is in
power-down because it may not lock to the correct frequency
on power-up. If it is updated, the correct programming se-
quence for the devices after power-up is to the R counter latch,
followed by the control latch, and finally the N counter latch,
with the required interval between the control latch and N
counter latch, as described in the Initial Power-Up section.
Software Power-Up/Power-Down
If the ADF4360-4 is powered down via the software (using the
control latch) and powered up again without any change to the
N counter latch during power-down, the device locks at the
correct frequency because it is already in the correct frequency
band. The lock time depends on the value of capacitance on the
C
N
pin, which is <5 ms for 10 µF capacitance. The smaller ca-
pacitance of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while the device is in
power-down because it may not lock to the correct frequency
on power-up. If it is updated, the correct programming se-
quence for the device after power-up is to the R counter latch,
followed by the control latch, and finally the N counter latch,
with the required interval between the control latch and N
counter latch, as described in the Initial Power-Up section.