NCP3063, NCP3063B, NCV3063
http://onsemi.com
10
Figure 16. Typical Buck Application Schematic
J204
GND
1
J203
1
C203
2.2 nF
C202
C205
C206
C201
R202
U201
NCP3063
5
36
4
8
7
1
2
COMP
TCAP
GND
N.C. SWC
SWE
R203
R201
0R15
D201
1N5819
J202
GND
1
J201
1
L201
+V
IN
= +12 V
0.1 mF
2K4 ±1%
3K9 ±1%
220 mF / 50 V
+
0.1 mF
470 mF / 25 V
+
+V
OUT
= +3.3 V / 800 mA
V
CC
I
PK
47 mH
Value of Components
Name Value
L201
47 mH, I
sat
> 1.5 A
D201 1 A, 40 V Schottky Rectifier
C202
220 mF, 50 V, Low ESR
C205
470 mF, 25 V, Low ESR
C203 2.2 nF Ceramic Capacitor
Name Value
R201
150 mW, 0.5 W
R202
2.40 kW
R203
3.90 kW
C201 100 nF Ceramic Capacitor
C202 100 nF Ceramic Capacitor
Test Results
Test Condition Results
Line Regulation V
in
= 9 V to 12 V, I
o
= 800 mA 8 mV
Load Regulation V
in
= 12 V, I
o
= 80 mA to 800 mA 9 mV
Output Ripple V
in
= 12 V, I
o
= 40 mA to 800 mA 85 mV
pp
Efficiency V
in
= 12 V, I
o
= 400 mA to 800 mA > 73%
Short Circuit Current
V
in
= 12 V, R
load
= 0.15 W
1.25 A
Figure 17. Buck Demoboard Layout
Figure 18. Efficiency vs. Output Current for the Buck
Demo Board at V
in
= 12 V, V
out
= 3.3 V, T
A
= 255C
OUTPUT LOAD (Adc)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
EFFICIENCY (%)
76
74
72
70
68
66
64
NCP3063, NCP3063B, NCV3063
http://onsemi.com
11
Figure 19. Typical Boost Application Schematic
J104
GND
1
J103
1
C103
2.2 nF
C102
C105
C106
C101
R102
U101
NCP3063
5
36
4
8
7
1
2
COMP
TCAP
GND
N.C. SWC
SWE
R103
R101
0R15
D101
1N5819
J102
GND
1
J101
1
L101
+V
IN
= +12 V
0.1 mF
1K0 ±1%
18K0 ±1%
470 mF / 25 V
+
0.1 mF
330 mF / 50 V
+
+V
OUT
= +24 V / 350 mA
V
CC
I
PK
100 mH
Value of Components
Name Value
L101
100 mH, I
sat
> 1.5 A
D101 1 A, 40 V Schottky Rectifier
C102
470 mF, 25 V, Low ESR
C105
330 mF, 50 V, Low ESR
C103 2.2 nF Ceramic Capacitor
Name Value
R101
150 mW, 0.5 W
R102
1.00 kW
R103
18.00 kW
C101 100 nF Ceramic Capacitor
C106 100 nF Ceramic Capacitor
Test Results
Test Condition Results
Line Regulation V
in
= 9 V to 15 V, I
o
= 250 mA 2 mV
Load Regulation V
in
= 12 V, I
o
= 30 mA to 350 mA 5 mV
Output Ripple V
in
= 12 V, I
o
= 10 mA to 350 mA 350 mV
pp
Efficiency V
in
= 12 V, I
o
= 50 mA to 350 mA > 85.5%
Figure 20. Boost Demoboard Layout
Figure 21. Efficiency vs. Output Current for the Boost
Demo Board at V
in
= 12 V, V
out
= 24 V, T
A
= 255C
OUTPUT LOAD (Adc)
0 0.05 0.1 0.15 0.2 0.3 0.4
EFFICIENCY (%)
90
85
84
83
82
81
80
0.25 0.35
89
88
87
86
NCP3063, NCP3063B, NCV3063
http://onsemi.com
12
Figure 22. Typical Voltage Inverting Application Schematic
J504
GND
1
J503
1
C503
2.2 nF
C502
C501
R502
U501
NCP3063
5
36
4
8
7
1
2
COMP
TCAP
GND
N.C. SWC
SWE
R503
R501
0R15
L501
J502
GND
1
J501
1
+V
IN
= +5 V
0.1 mF
16K9 ±1%
1K96 ±1%
330 mF / 25 V
+
22 mH
V
OUT
= 12 V / 100 mA
V
CC
I
PK
D501
C505
470 mF / 35 V
+
C506
0.1 mF
1N5819
Value of Components
Name Value
L501
22 mH, I
sat
> 1.5 A
D501 1 A, 40 V Schottky Rectifier
C502
330 mF, 25 V, Low ESR
C505
470 mF, 35 V, Low ESR
C503 2.2 nF Ceramic Capacitor
Name Value
R501
150 mW, 0.5 W
R502
16.9 kW
R503
1.96 kW
C501 100 nF Ceramic Capacitor
C506 100 nF Ceramic Capacitor
Test Results
Test Condition Results
Line Regulation V
in
= 4.5 V to 6 V, I
o
= 50 mA 1.5 mV
Load Regulation V
in
= 5 V, I
o
= 10 mA to 100 mA 1.6 mV
Output Ripple V
in
= 5 V, I
o
= 0 mA to 100 mA 300 mV
pp
Efficiency V
in
= 5 V, I
o
= 100 mA 49.8%
Short Circuit Current
V
in
= 5 V, R
load
= 0.15 W
0.885 A
Figure 23. Voltage Inverting Demoboard Layout
Figure 24. Efficiency vs. Output Current for the
Voltage Inverting Demo Board at V
in
= +5 V,
V
out
= 12 V, T
A
= 255C
OUTPUT LOAD (mA
dc
)
8040200
36
38
40
44
46
48
50
52
EFFICIENCY (%)
60 100
42

NCP3063BSTEXGEVB

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Power Management IC Development Tools ROHS BST DEMO BD EXT FET
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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