© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 4
1 Publication Order Number:
MC74VHCT257A/D
MC74VHCT257A
Quad 2−Channel Multiplexer
with 3−State Outputs
The MC74VHCT257A is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common
select (S) and enable (OE) inputs. When (OE) is held High, selection
of data is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT257A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V
CC
= 0 V. These
input and output structures help prevent device destruction caused by
supply voltage−input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t
PD
= 4.1 ns (Typ) at V
CC
= 5.0 V
• Low Power Dissipation: I
CC
= 4.0 mA (Max) at T
A
= 25°C
• TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V
OLP
= 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
TSSOP−16
DT SUFFIX
CASE 948F
SOIC−16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
VHCT257AG
AWLYWW
VHCT
257A
ALYWG
G
(Note: Microdot may be in either location)
1
1
16
1
1
16
1
SOEIAJ−16
M SUFFIX
CASE 966
74VHCT257
ALYWG
1
16
FUNCTION TABLE
OE S Y0 − Y3
A0 − A3, B0 − B3 = the levels of
the respective Data−Word Inputs.
H
L
L
X
L
H
Z
A0−A3
B0−B3
Inputs
Outputs
