AD7868
–12–
REV. B
AD7868—TMS32020/TMS320C25 Interface
Figure 18 shows an interface which is suitable for the
TMS32020/TMS320C25 processors. This interface is config-
ured for synchronous, continuous clock operation. Note, the
AD7868 will not interface correctly to these processors if the
AD7868 is configured for a noncontinuous clock. Conversion
starts and DAC updating are controlled by an external timer.
TMS32020
TMS320C25
FSX
DX
TCLK
DT
TFS
*ADDITIONAL PINS OMITTED FOR CLARITY
LDAC
FSR
CLKR
DR
RCLK
DR
CONVST
RFS
CONTROL
TIMER
AD7868*
4.7kΩ 2kΩ 4.7kΩ
5V
+
5V
–
CLKX
Figure 18. AD7868—TMS32020/TMS320C25 Interface
APPLICATION HINTS
Good printed circuit board (PCB) layout is as important as the
circuit design itself in achieving high speed A/D performance.
The AD7868’s comparator is required to make bit decisions on
an LSB size of 1.465 mV. To achieve this, the designer has to
be conscious of noise both in the ADC itself and in the preced-
ing analog circuitry. Switching mode power supplies are not rec-
ommended as the switching spikes will feed through to the
comparator causing noisy code transitions. Other causes of con-
cern are ground loops and digital feedthrough from micropro-
cessors. These are factors which influence any ADC, and a
proper PCB layout which minimizes these effects is essential for
best performance.
LAYOUT HINTS
Ensure that the layout for the printed circuit board has the digi-
tal and analog signal lines separated as much as possible. Take
care not to run any digital track alongside an analog signal track.
Guard (screen) the analog input with AGND.
Establish a single point analog ground (star ground) separate
from the logic system ground as close as possible to the AD7868
AGND pins. Connect all other grounds and the AD7868
DGND to this single analog ground point. Do not connect any
other digital grounds to this analog ground point.
Low impedance analog and digital power supply common re-
turns are essential to low noise operation of the ADC, so make
the foil width for these tracks as wide as possible. The use of
ground planes minimizes impedance paths and also guards the
analog circuitry from digital noise. The circuit layout of Figures
22 and 23 have both analog and digital ground planes which are
kept separated and only joined together at the AD7868 AGND
pins.
NOISE
Keep the input signal leads to V
IN
and signal return leads from
AGND as short as possible to minimize input noise coupling. In
applications where this is not possible, use a shielded cable be-
tween the source and the ADC. Reduce the ground circuit im-
pedance as much as possible since any potential difference in
grounds between the signal source and the ADC appears as an
error voltage in series with the input signal.
INPUT/OUTPUT BOARD
Figure 19 shows an analog I/O board based on the AD7868.
The corresponding printed circuit board (PCB) layout and
silkscreen are shown in Figures 21 to 23.
The analog input to the AD7868 is buffered with an AD711 op
amp. There is a component grid provided near the analog input
on the PCB which may be used for an antialiasing filter for the
ADC or a reconstruction filter for the DAC or any other condi-
tioning circuitry. To facilitate this option, there are two wire
links (labeled LK1 and LK2) required on the analog input and
output tracks.
The board contains a SHA circuit which can be used on the
output of the AD7868 DAC to extend the very good perfor-
mance of the part over a wider frequency range. The increased
performance from the SHA can be seen in Figures 14 and 15 of
this data sheet. A wire link (labeled LK3) connects the board
output to either the SHA output or directly to the AD7868
DAC output.
There are three
LDAC link options on the board; LDAC can be
driven from an external source independent of
CONVST,
LDAC can be tied to CONVST or LDAC can be tied to GND.
Choosing the latter option of tying
LDAC to GND disables the
SHA operation, and places the SHA permanently in the track
mode.
Microprocessor connections to the board are made by a 9-way
D-type connector. The pinout is shown in Figure 20. The
ADC’s digital outputs are buffered with 74HC4050s. These
buffers provide a higher current output capability for high
capacitance loads or cables. Normally, these buffers are not
required as the AD7868 will be sitting on the same board as the
processor.
POWER SUPPLY CONNECTIONS
The PCB requires two analog power supplies and one 5 V digi-
tal supply. Connections to the analog supply are made directly
to the PCB as shown on the silkscreen in Figure 21. The con-
nections are labeled V+ and V– and the range for both of these
supplies is 12 V to 15 V. Connections to the 5 V digital supply
are made through the D-type connector SKT6. The ±5 V ana-
log supply required by the AD7868 are generated from two volt-
age regulators on the V+ and V– supplies.
