Data Sheet 4 Rev. 1.2, 2004-01-01
TLE 4473 GV55
Figure 2 Block Diagram (TLE 4473 GV55) with Typical External Components
TLE 4473 GV55
AEA03298.VSD
Current and
Saturation
Control,
Overcurrent
Protection
Overtemperature
Shutdown
Bandgap
Reference
Inhibit
Reset
Generator
Watchdog
Current and
Saturation
Control,
Overcurrent
Protection
Inhibit
Reset
Generator
GND
10
µF
4.7 k
4
3
Q2
RO2
µC
Supply
µC
Reset
1WI
Watchdog
(from µC)
100 nF
11D2
2RO1
5Q1
10
µF
4.7 k
e.g. Sensor
Supply
e.g. Sensor
Reset
(to µC)
INH18
µC
INH29
Ignition
I7
V
Bat
C
I
100 nF
6, 12
100 nF
10D1
TLE 4473 GV55
Data Sheet 5 Rev. 1.2, 2004-01-01
Application Information
The output voltage is divided by a voltage divider and compared to an internal reference
voltage. A regulation loop controls the Q2 output in order to achieve a stable output
voltage at the Q2 pin. A second regulation loop controls the Q1 output. The reference
voltage for the Q1 is the regulated Q2 potential (tracking regulator).
Figure 2 includes the components needed for a typical application. Maintaining the
stability of the regulation loops requires a capacitor of 10
µF both outputs. A maximum
ESR of 5
is permissible for the Q2 output, while the Q1 output requires a capacitor with
a maximum ESR of 3
. For both output blocking capacitors it is recommended to use
tantalum types in order to stay in the permissible ESR range over the full operating
temperature range.
At the input of the regulator a capacitor is necessary for compensating line influences. A
minimum of 100 nF (ceramic capacitor) is recommended. In addition for compensation
of long input lines of several meters an electrolytic input capacitor of 47
µF 220 µF
should be placed at the input.
Figure 3 Pin Configuration (top view)
AEP03318.VSD
1WI
2
RO1
3
RO2
12
11
10
D2
D1
4Q2
5
Q1
6
N.C.
9
8
7
INH2
INH1
I
GND
TLE 4473
(P-DSO-12-6)
Pin 6 and heat slug should be connected to GND
Data Sheet 6 Rev. 1.2, 2004-01-01
TLE 4473 GV55
Table 1 Pin Definitions and Functions
Pin No. Symbol Function
1WIWatchdog input; input for watchdog pulses, positive edge
triggered
2RO1Reset and watchdog output for Q1; open collector output
3RO2Reset output 2; open collector output
4Q2Stand-by regulator output voltage; block to GND with a
capacitor C
Q2
10 µF, ESR < 5 at 10 kHz
5Q1Main regulator output voltage; output voltage tracked to Q2
voltage; block to GND with a capacitor
C
Q1
10 µF, ESR < 3
at 10 kHz
6N.C.Not connected; connect to GND
7I Input voltage; block to ground directly at the IC with a ceramic
capacitor
8 INH1
Inhibit input 1; low level disables Q1, integrated pull-down
resistor
9 INH2
Inhibit input 2; low level at INH2 and INH1 disables Q2 and Q1,
integrated pull-down resistor
10 D1 Reset Delay 1; connect to ground via a capacitor to set reset
delay for Q1
11 D2 Reset Delay 2; connect to ground via a capacitor to set reset
delay and watchdog timing for Q2
12 GND Ground

TLE4473GV55AUMA1

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
LDO Voltage Regulators LINEAR VOLTAGE REGULATOR
Lifecycle:
New from this manufacturer.
Delivery:
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