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MC100EP29DTG

P1-P3P4-P6P7-P9P10-P10
MC10EP29, MC100EP29
http://onsemi.com
7
Table 11. AC CHARACTERISTICS V
CC
= 0 V; V
EE
= −3.0 V to −5.5 V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 20)
Symbo
l
Characteristic
−40°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Frequency
(See Figure 2 F
max
/JITTER)
> 3.0 > 3.0 > 3.0 GHz
t
PLH
,
t
PHL
Propagation Delay to CLK
Output Differential S
R
300
275
300
380
380
400
450
475
500
350
300
325
420
400
420
500
500
525
400
350
375
470
450
470
550
550
575
ps
t
S
t
H
Setup Time
Hold Time
100
100
20
20
100
100
20
20
100
100
20
20
ps
t
RR
/t
RR2
Set/Reset Recovery 150 80 150 80 150 80 ps
t
PW
Minimum Pulse Width
Set, Reset
500 300 500 300 500 300 ps
t
JITTER
Cycle−to−Cycle Jitter
(See Figure 2 F
max
/JITTER)
.2 < 1 .2 < 1 .2 < 1 ps
V
PP
Input Voltage Swing (Note 21) 150 800 1200 150 800 1200 150 800 1200 mV
t
r
t
f
Output Rise/Fall Times Q, Q
(20% − 80%)
100 180 250 150 210 300 175 230 325 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V
CC
− 2.0 V.
21.V
PP
(min) is the minimum input swing for which AC parameters are guaranteed.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
0
100
200
300
400
500
600
700
800
900
0 1000 2000 3000 4000 5000
Figure 2. F
max
/Jitter
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
9
(JITTER)
V
OUTpp
(mV)
JITTER
OUT
ps (RMS)
MC10EP29, MC100EP29
http://onsemi.com
8
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
− 2.0 V
ORDERING INFORMATION
Device Package Shipping
†
MC10EP29DTG TSSOP−20
(Pb−Free)
75 Units / Rail
MC10EP29DTR2G TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC10EP29MNG QFN−20
(Pb−Free)
92 Units / Rail
MC10EP29MNTXG QFN−20
(Pb−Free)
3000 / Tape & Reel
MC100EP29DTG TSSOP−20
(Pb−Free)
75 Units / Rail
MC100EP29DTR2G TSSOP−20
(Pb−Free)
2500 / Tape & Reel
MC100EP29MNG QFN−20
(Pb−Free)
92 Units / Rail
MC100EP29MNTXG QFN−20
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D −
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
MC10EP29, MC100EP29
http://onsemi.com
9
PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B 4.30 4.50 0.169 0.177
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
110
1120
PIN 1
IDENT
A
B
−T−
0.100 (0.004)
C
D
G
H
SECTION N−N
K
K1
JJ1
N
N
M
F
−W−
SEATING
PLANE
−V−
−U−
S
U
M
0.10 (0.004) V
S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
--- ---
S
U0.15 (0.006) T
7.06
16X
0.36
16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
P1-P3P4-P6P7-P9P10-P10

MC100EP29DTG

Mfr. #:
Buy MC100EP29DTG
Manufacturer:
ON Semiconductor
Description:
Flip Flops 3.3V/5V ECL Dual Diff Data D-Type
Lifecycle:
New from this manufacturer.
Delivery:
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