LTC2444/LTC2445/
LTC2448/LTC2449
9
2444589fc
For more information www.linear.com/LTC2444
applicaTions inForMaTion
CONVERTER OPERATION
Converter Operation Cycle
The LTC2444/LTC2445/LTC2448/LTC2449 are multi-
channel, high speed, delta-sigma analog-to-digital convert-
ers with an easy to use 3- or 4-wire serial interface (see
Figure 1). Their operation
is made up of three states. The
converter operating cycle begins with the conversion, fol
-
lowed by the low power sleep state and ends with the data
output/input (see Figure 2). The 4-wire interface consists
of serial data input (SDI), serial data output (SDO), serial
clock (SCK) and chip select (CS). The interface, timing,
operation cycle and data out format is compatible with
Linear’s entire family of ∆Σ converters.
corresponds to the conversion just performed. This result
is shifted out on the serial data out pin (SDO) under the
control of the serial clock (SCK). Data is updated on the
falling edge of SCK allowing the user to reliably latch data
on the rising edge of SCK (see Figure 3). The data output
state is concluded once 32 bits are read out of the ADC
or when CS is brought HIGH. The device automatically
initiates a new conversion and the cycle repeats.
Through timing control of the CS, SCK and EXT pins, the
LTC2444/LTC2445/LTC2448/LTC2449 offer several flex
-
ible modes of operation (internal or external SCK). These
various modes do not require programming configuration
registers; moreover, they do not disturb the cyclic operation
described above. These modes of operation are described
in detail in the Serial Inter
face Timing Modes section.
Ease of Use
The LTC2444/LTC2445/LTC2448/LTC2449 data output
has no latency, filter settling delay or redundant data
associated with the conversion cycle while operating
in the 1X mode. There is a one-to-one correspondence
between the conversion and the output data. Therefore,
multiplexing multiple analog voltages is easy. Speed/
resolution adjustments may be made seamlessly between
two conversions without settling errors.
The LTC2444/LTC2445/LTC2448/LTC2449 perform offset
and full-scale calibrations every conversion cycle. This
calibration is transparent to the user and has no effect
on the cyclic operation described above. The advantage
of continuous calibration is extreme stability of offset and
full-scale readings with respect to time, supply voltage
change and temperature drift.
Power-Up Sequence
The LTC2444/LTC2445/LTC2448/LTC2449 automatically
enter an internal reset state when the power supply volt-
age V
CC
drops below approximately 2.2V. This feature
guarantees the integrity of the conversion result and of
the serial interface mode selection.
When the V
CC
voltage rises above this critical threshold, the
converter creates an internal power-on-reset (POR) signal
with a duration of approximately 0.5ms. The POR signal
CONVERT
SLEEP
CHANNEL SELECT
SPEED SELECT
DATA OUTPUT
POWER UP
IN
+
=CH0, IN
–
=CH1
OSR=256,1X MODE
CS = LOW
AND
SCK
Figure 2. LTC2444/LTC2445/LTC2448/LTC2449
State Transition Diagram
Initially, the LTC2444/LTC2445/LTC2448/LTC2449 per-
form a conversion. Once the conversion is complete, the
device ent
ers the sleep state. While in this sleep state, power
consumption is reduced below 10µA. The part remains
in the sleep state as long as CS is HIGH. The conversion
result is held indefinitely in a static shift register while the
converter is in the sleep state.
Once CS is pulled LOW, the device begins outputting the
conversion result. There is no latency in the conversion
result while operating in the 1x mode. The data output
