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NTD40N03RT4

P1-P3P4-P6P7-P7
NTD40N03R
http://onsemi.com
4
100
10
1
8
6
4
2
0
20
18
16
10
6
0
10 10
1000
155020
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
C, CAPACITANCE (pF)
800
600
400
200
0
5
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
R
G
, GATE RESISTANCE (W)
Figure 10. Diode Forward Voltage versus
Current
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
I
S
, SOURCE CURRENT (AMPS)
t, TIME (ns)
08642
1 10 100 0 0.40.2 0.8 1.0
I
D
= 10 A
T
J
= 25°C
V
GS
V
GS
= 0 V
V
DS
= 0 V
T
J
= 25°C
C
rss
C
iss
C
oss
C
rss
4
2
0.6
Q
2
C
iss
V
DS
= 10 V
I
D
= 10 A
V
GS
= 10 V
V
GS
= 0 V
t
r
t
d(off)
t
d(on)
t
f
V
GS
V
DS
Q
1
Q
T
T
J
= 25°C
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1 1 100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1
100
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
10
SINGLE PULSE
V
GS
= 20 V
T
C
= 25°C
1 ms
100 ms
10 ms
dc
8
14
12
10 ms
NTD40N03R
http://onsemi.com
5
Figure 12. Thermal Response
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
t, TIME (s)
0.1
1.0
0.01
1100.10.010.0010.00010.00001
0.2
D = 0.5
0.1
R
q
JC
(t) = r(t) R
q
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
- T
C
= P
(pk)
R
q
JC
(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
0.05
0.01
SINGLE PULSE
0.02
ORDERING INFORMATION
Device Package Shipping
†
NTD40N03R−1G DPAK (Straight Lead)
(Pb−Free)
75 Units/Rail
NTD40N03RT4G DPAK
(Pb−Free)
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NTD40N03R
http://onsemi.com
6
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369AA−01
ISSUE B
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
b
D
E
b3
L3
L4
b2
e
M
0.005 (0.13) C
c2
A
c
C
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
D 0.235 0.245 5.97 6.22
E 0.250 0.265 6.35 6.73
A 0.086 0.094 2.18 2.38
b 0.025 0.035 0.63 0.89
c2 0.018 0.024 0.46 0.61
b2 0.030 0.045 0.76 1.14
c 0.018 0.024 0.46 0.61
e 0.090 BSC 2.29 BSC
b3 0.180 0.215 4.57 5.46
L4 −−− 0.040 −−− 1.01
L 0.055 0.070 1.40 1.78
L3 0.035 0.050 0.89 1.27
Z 0.155 −−− 3.93 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
12 3
4
5.80
0.228
2.58
0.102
1.60
0.063
6.20
0.244
3.00
0.118
6.17
0.243
ǒ
mm
inches
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
H 0.370 0.410 9.40 10.41
A1 0.000 0.005 0.00 0.13
L1 0.108 REF 2.74 REF
L2 0.020 BSC 0.51 BSC
A1
H
DETAIL A
SEATING
PLANE
A
B
C
L1
L
H
L2
GAUGE
PLANE
DETAIL A
ROTATED 90 CW5
P1-P3P4-P6P7-P7

NTD40N03RT4

Mfr. #:
Buy NTD40N03RT4
Manufacturer:
ON Semiconductor
Description:
MOSFET N-CH 25V 7.8A DPAK
Lifecycle:
New from this manufacturer.
Delivery:
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