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HC20K600BC652AD

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
Altera Corporation 10–5
September 2008
Recommended Operating Conditions
Table 10–7. 2.5-V I/O Specifications
Symbol Parameter Conditions Minimum Maximum Units
V
CCIO
Output supply
voltage
2.375 2.625 V
V
IH
High-level input
voltage
1.7 V
CCIO
+ 0.3 V
V
IL
Low-level input
voltage
–0.3 0.7 V
I
I
Input pin leakage
current
V
IN
= 0 V or 3.3 V –10 10 μA
V
OH
High-level output
voltage
I
OH
= –0.1 mA (1) 2.1 V
I
OH
= –1 mA (1) 2.0 V
I
OH
= –2 mA (1) 1.7 V
V
OL
Low-level output
voltage
I
OL
= 0.1 mA (2) 0.2 V
I
OL
= 1 mA (2) 0.4 V
I
OL
= 2 mA (2) 0.7 V
Table 10–8. 1.8-V I/O Specifications
Symbol Parameter Conditions Minimum Maximum Units
V
CCIO
Output supply
voltage
1.7 1.9 V
V
IH
High-level input
voltage
0.65 × V
CCIO
V
CCIO
+ 0.3 V
V
IL
Low-level input
voltage
0.35 × V
CCIO
V
I
I
Input pin leakage
current
V
IN
= 0 V or 3.3 V –10 10 μA
V
OH
High-level output
voltage
I
OH
= –2 mA (1) V
CCIO
– 0.45 V
V
OL
Low-level output
voltage
I
OL
= 2 mA (2) 0.45 V
Table 10–9. 3.3-V PCI Specifications (Part 1 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
V
CCIO
I/O supply voltage 3.0 3.3 3.6 V
V
IH
High-level input
voltage
0.5 × V
CCIO
V
CCIO
+ 0.5 V
10–6 Altera Corporation
September 2008
HardCopy Series Handbook, Volume 1
V
IL
Low-level input
voltage
–0.5 0.3 × V
CCIO
V
I
I
Input pin leakage
current
0 < V
IN
< V
CCIO
–10 10 μA
V
OH
High-level output
voltage
I
OUT
= –500 μA0.9 × V
CCIO
V
V
OL
Low-level output
voltage
I
OUT
= 1,500 μA0.1 × V
CCIO
V
Table 10–10. 3.3-V PCI-X Specifications
Symbol Parameter Conditions Minimum Typical Maximum Units
V
CCIO
Output supply
voltage
3.0 3.3 3.6 V
V
IH
High-level input
voltage
0.5 × V
CCIO
V
CCIO
+ 0.5 V
V
IL
Low-level input
voltage
–0.5 0.35 × V
CCIO
V
V
IPU
Input pull-up voltage 0.7 × V
CCIO
V
I
IL
Input pin leakage
current
0 < V
IN
< V
CCIO
–10.0 10.0 μΑ
V
OH
High-level output
voltage
I
OUT
= –500 µA 0.9 × V
CCIO
V
V
OL
Low-level output
voltage
I
OUT
= 1500 µA 0.1 × V
CCIO
V
L
PIN
Pin Inductance 15.0 nH
Table 10–11. 3.3-V LVDS I/O Specifications (Part 1 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
V
CCIO
I/O supply voltage 3.135 3.3 3.465 V
V
OD
Differential output
voltage
R
L
= 100 Ω 250 450 mV
V
OD
Change in VOD
between high and
low
R
L
= 100 Ω 50 mV
V
OS
Output offset voltage R
L
= 100 Ω 1.125 1.25 1.375 V
Table 10–9. 3.3-V PCI Specifications (Part 2 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
Altera Corporation 10–7
September 2008
Recommended Operating Conditions
V
OS
Change in VOS
between high and
low
R
L
= 100 Ω 50 mV
V
TH
Differential input
threshold
V
CM
= 1.2 V –100 100 mV
V
IN
Receiver input
voltage range
0.0 2.4 V
R
L
Receiver differential
input resistor
(external to
APEX 20K devices)
90 100 110 Ω
Table 10–12. GTL+ I/O Specifications
Symbol Parameter Conditions Minimum Typical Maximum Units
V
TT
Termination voltage 1.35 1.5 1.65 V
V
REF
Reference voltage 0.88 1.0 1.12 V
V
IH
High-level input
voltage
V
REF
+ 0.1 V
V
IL
Low-level input
voltage
V
REF
– 0.1 V
V
OL
Low-level output
voltage
I
OL
= 36 mA (2) 0.65 V
Table 10–13. SSTL-2 Class I Specifications (Part 1 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
V
CCIO
I/O supply voltage 2.375 2.5 2.625 V
V
TT
Termination voltage V
REF
– 0.04 V
REF
V
REF
+ 0.04 V
V
REF
Reference voltage 1.15 1.25 1.35 V
V
IH
High-level input
voltage
V
REF
+ 0.18 V
CCIO
+ 0.3 V
V
IL
Low-level input
voltage
–0.3 V
REF
– 0.18 V
Table 10–11. 3.3-V LVDS I/O Specifications (Part 2 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

HC20K600BC652AD

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Intel
Description:
IC FPGA APEX 652BGA APEX HardCopy
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