FDS8333C Datasheet FDS8333C | P1-P3

August 2002

2002 Fairchild Semiconductor Corporation FDS8333C Rev C (W)

FDS8333C

30V N & P-Channel PowerTrench



MOSFETs

General Description

These N & P-Channel MOSFETs are

produced using Fairchild Semiconductor’s

advanced PowerTrench process that has been

especially tailored to minimize on-state

resistance and yet maintain superior switching

performance.

These devices are well suited for low voltage

and battery powered applications where low

in-line power loss and fast switching are

required.

Features

• Q1 4.1 A, 30V. R

DS(ON)

= 80 mΩ @ V

GS

= 10 V

R

DS(ON)

= 130 mΩ @ V

GS

= 4.5 V

• Q2 –3.4 A, 30V. R

DS(ON)

= 130 mΩ @ V

GS

= –10 V

R

DS(ON)

= 200 mΩ @ V

GS

= –4.5 V

• Low gate charge

• High performance trench technology for extremely

low R

DS(ON)

.

• High power and handling capability in a widely used

surface mount package.

S

D

S

SO-8

D

G

D1

D2

S1

G1

S2

G2

Pin 1

SO-8

4

3

2

1

5

6

7

8

Q1

Q2

Absolute Maximum Ratings T

A

=25

o

C unless otherwise noted

Symbol Parameter Q1 Q2 Units

V

DSS

Drain-Source Voltage 30 –30 V

V

GSS

Gate-Source Voltage ±16 ±20

I

D

Drain Current – Continuous (Note 1a) 4.1 –3.4 A

– Pulsed 20 –20

Power Dissipation for Dual Operation 2

Power Dissipation for Single Operation (Note 1a)

1.6

(Note 1b) 1

P

D

(Note 1c) 0.9

W

T

J

, T

STG

Operating and Storage Junction Temperature Range –55 to +150 °C

Thermal Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient (Note 1a)

78

°C/W

R

θJC

Thermal Resistance, Junction-to-Case (Note 1)

40

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS8333C FDS8333C 7’’ 12mm 2500 units

FDS8333C

FDS8333C Rev C (W)

Electrical Characteristics T

A

= 25°C unless otherwise noted

Symbol

Parameter Test Conditions Min Typ

Max

Units

Off Characteristics

BV

DSS

Drain–Source Breakdown Voltage

V

GS

= 0 V, I

D

= 250 µA

V

GS

= 0 V, I

D

= –250 µA

Q1

Q2

30

–30

V

∆BVDSS

∆T

J

Breakdown Voltage Temperature

Coefficient

I

D

= 250 µA,Ref. to 25°C

I

D

= –250 µA,Ref. to 25°C

Q1

Q2

25

–22

mV/°C

I

DSS

Zero Gate Voltage Drain Current

V

DS

= 24 V, V

GS

= 0 V

V

DS

= –24 V, V

GS

= 0 V

Q1

Q2

1

–1

µA

I

GSSF

/I

GSSR

Gate–Body Leakage, Forward

V

GS

= ± 16 V, V

DS

= 0 V

±100

nA

I

GSSF

/I

GSSR

Gate–Body Leakage, Reverse

V

GS

= ± 20V , V

DS

= 0 V

±100

nA

On Characteristics (Note 2)

V

GS(th)

Q1

V

DS

= V

GS

, I

D

= 250 µA 1 1.7 3

Gate Threshold Voltage

Q2

V

DS

= V

GS

, I

D

= –250 µA –1 –1.8 –3

V

∆VGS(th)

∆T

J

Gate Threshold Voltage

Temperature Coefficient

I

D

= 250 µA,Ref. To 25°C Q1

I

D

= –250 µA,Ref. to 25°C Q2

–4.2

3.7

mV/°C

R

DS(on)

Q1

V

GS

= 10 V, I

D

= 4.1 A

V

GS

= 4.5 V, I

D

= 3.2 A

V

GS

= 10 V, I

D

= 4.1 A T

J

=125°C

67

81

103

80

130

145

Static Drain–Source

On–Resistance

Q2

V

GS

= –10 V, I

D

= –3.4 A

V

GS

= – 4.5 V, I

D

= –2.5 A

V

GS

= –10V,I

D

= –3.4A, T

J

=125°C

105

167

147

130

200

220

mΩ

I

D(on)

Q1

V

GS

= 10 V, V

DS

= 5 V

10

On–State Drain Current

Q2

V

GS

= –10 V, V

DS

= –5 V

–5

A

g

FS

Q1

V

DS

= 5 V I

D

= 4.1 A

9

Forward Transconductance

Q2

V

DS

= –5 V I

D

= –3.4A

5

S

Dynamic Characteristics

C

iss

Q1

V

DS

=10 V, V

GS

= 0 V, f=1.0MHz 282

Input Capacitance

Q2

V

DS

=–10 V, V

GS

= 0 V, f=1.0MHz

185

pF

C

oss

Q1

V

DS

=10 V, V

GS

= 0 V, f=1.0MHz

49

Output Capacitance

Q2

V

DS

=–10 V, V

GS

= 0 V, f=1.0MHz

56

pF

C

rss

Q1

V

DS

=10 V, V

GS

= 0 V, f=1.0MHz

20

Reverse Transfer Capacitance

Q2

V

DS

=–10 V, V

GS

= 0 V, f=1.0MHz

26

pF

R

G

Q1

V

GS

= 15 mV, f=1.0MHz

2.3

Gate Resistance

Q2

V

GS

=–15 mV, f=1.0MHz

–9.6

Ω

Switching Characteristics (Note 2)

t

d(on)

Q1

4.5 9

Turn–On Delay Time

Q2

4.5 9

ns

t

r

Q1

6 12

Turn–On Rise Time

Q2

13 23

ns

t

d(off)

Q1

19 34

Turn–Off Delay Time

Q2

11 20

ns

t

f

Q1

1.5 3

Turn–Off Fall Time

Q2

For Q1:

V

DS

=10 V, I

DS

= 1 A

V

GS

= 4.5 V, R

GEN

= 6 Ω

For Q2:

V

DS

=–10 V, I

DS

= –1 A

V

GS

= –4.5 V, R

GEN

= 6 Ω

2 4

ns

Q

g

Q1

4.7 6.6

Total Gate Charge

Q2

4.1 5.7

nC

Q

gs

Q1

0.9

Gate–Source Charge

Q2

0.8

nC

Q

gd

Q1

0.6

Gate–Drain Charge

Q2

For Q1:

V

DS

=10 V, I

DS

= 4.1 A

V

GS

= 4.5 V, R

GEN

= 6 Ω

For Q2:

V

DS

=–10 V, I

DS

= –3.4 A

V

GS

= –4.5 V,

0.4

nC

FDS8333C

FDS8333C Rev C (W)

Electrical Characteristics T

A

= 25°C unless otherwise noted

Symbol

Parameter Test Conditions Min Typ

Max

Units

Drain–Source Diode Characteristics and Maximum Ratings

V

SD

Q1

V

GS

= 0 V, I

S

= 1.3 A (Note 2)

0.8 1.2

Drain–Source Diode Forward

Voltage

Q2

V

GS

= 0 V, I

S

= –1.3 A (Note 2)

0.8 –1.2

V

t

rr

Q1

I

F

= 4.1 A, d

iF

/d

t

= 100 A/µs

16.3

Diode Reverse Recovery

Time

Q2

I

F

= –3.4 A, d

iF

/d

t

= 100 A/µs

14.5

nS

Q

rr

Q1

I

F

= 4.1 A, d

iF

/d

t

= 100 A/µs

26.7

Diode Reverse Recovery

Charge

Q2

I

F

= –3.4 A, d

iF

/d

t

= 100 A/µs

21.1

nC

Notes:

1. R

θJA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. R

θJC

is guaranteed by design while R

θCA

is determined by the user's board design.

a) 78°C/W when

mounted on a

0.5in

2

pad of 2

oz copper

b) 125°C/W when

mounted on a

0.02 in

2

pad of

2 oz copper

c) 135°C/W when

mounted on a

minimum pad.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDS8333C

FDS8333C

FDS8333C

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