PCA9632 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 27 July 2011 11 of 39
NXP Semiconductors
PCA9632
4-bit Fm+ I
2
C-bus low power LED driver
7.3.1 Mode register 1, MODE1
[1] It takes 500 s max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not
guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 s window.
[2] When the oscillator is off (Sleep mode), the LED outputs cannot be turned on, off or dimmed/blinked.
7.3.2 Mode register 2, MODE2
[1] See Section 7.6 “Using the PCA9632 with and without external drivers” for more details. Normal LEDs can be driven directly in either
mode. Some newer LEDs include integrated Zener diodes to limit voltage transients, reduce EMI, protect the LEDs, and these must be
driven only in the open-drain mode to prevent overheating the IC.
[2] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9632. Applicable to registers from
02h (PWM0) to 08h (LEDOUT) only.
Table 6. MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 AI2 read only 0 Register Auto-Increment disabled
1* Register Auto-Increment enabled
6 AI1 read only 0* Auto-Increment bit 1 = 0
1 Auto-Increment bit 1 = 1
5 AI0 read only 0* Auto-Increment bit 0 = 0
1 Auto-Increment bit 0 = 1
4 SLEEP R/W 0 Normal mode
[1]
.
1* Low power mode. Oscillator off
[2]
.
3 SUB1 R/W 0* PCA9632 does not respond to I
2
C-bus subaddress 1.
1 PCA9632 responds to I
2
C-bus subaddress 1.
2 SUB2 R/W 0* PCA9632 does not respond to I
2
C-bus subaddress 2.
1 PCA9632 responds to I
2
C-bus subaddress 2.
1 SUB3 R/W 0* PCA9632 does not respond to I
2
C-bus subaddress 3.
1 PCA9632 responds to I
2
C-bus subaddress 3.
0 ALLCALL R/W 0 PCA9632 does not respond to LED All Call I
2
C-bus address.
1* PCA9632 responds to LED All Call I
2
C-bus address.
Table 7. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 - read only 0* reserved
6 - read only 0* reserved
5 DMBLNK R/W 0* Group control = dimming
1 Group control = blinking
4INVRT
[1]
R/W 0* Output logic state not inverted. Value to use when no external driver used.
1 Output logic state inverted. Value to use when external driver used.
3 OCH R/W 0* Outputs change on STOP command.
[2]
1 Outputs change on ACK.
2OUTDRV
[1]
R/W 0* The 4 LED outputs are configured with an open-drain structure.
1 The 4 LED outputs are configured with a totem pole structure.
1 to 0 OUTNE[1:0] R/W 01* unused
