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PCA9512ADP,118
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
PCA9512A_PCA9512
B
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 2013. All rights re
served
.
Product data sheet
Rev
. 6
— 1 March 2013
16 of 27
NXP Semiconductors
PCA9512A; PCA9512B
Level shif
ting hot swa
pp
able I
2
C-bus and SMBus bus buffer
1
1.1
T
ypical performance characteristics
I
CC2
(pin 1) typical current averages 0.1
mA less than I
CC
on pin 8.
Fig 1
1.
I
CC
versus temperature
Fig 12.
I
trt(pu)
versus temperature
C
i
=C
o
> 100 pF; R
PU(in)
=R
PU(out)
=1
0k
V
CC
= 3.3 V or 5.5 V
Fig 13.
Inpu
t/output t
PHL
versus temperature
Fig 14.
Co
nnection circuitry V
O
V
I
T
amb
(
°
C)
−
40
+90
+25
002aab795
1.95
2.15
I
CC
(mA)
1.35
V
CC
= 5.5
V
3.3 V
2.7 V
1.75
1.55
T
amb
(
°
C)
−
40
+90
+25
002aab796
4
8
12
I
trt(pu)
(mA)
0
3.3 V
V
CC
= 5
V
2.7 V
T
amb
(
°
C)
−
40
+90
+25
002aab589
70
80
90
t
PHL
(ns)
60
3.3 V
V
CC
= 5.5
V
2.7 V
R
PU
(k
Ω
)
04
0
30
10
20
002aab591
150
250
350
V
O
−
V
I
(mV)
50
V
CC
= 5
V
3.3 V
PCA9512A_PCA9512
B
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 2013. All rights re
served
.
Product data sheet
Rev
. 6
— 1 March 2013
17 of 27
NXP Semiconductors
PCA9512A; PCA9512B
Level shif
ting hot swa
pp
able I
2
C-bus and SMBus bus buffer
12. T
est
information
R
L
= load resistor
C
L
= load capacitance includes jig and probe capacitance
R
T
= termination resistance should be equal to the output impedance Z
o
of the pulse generator
Fig 15.
T
est
circuitry for switching times
PULSE
GENERA
T
OR
V
O
C
L
100 pF
R
L
10 k
Ω
002aab595
R
T
V
I
V
CC
V
CC
DUT
PCA9512A_PCA9512
B
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 2013. All rights re
served
.
Product data sheet
Rev
. 6
— 1 March 2013
18 of 27
NXP Semiconductors
PCA9512A; PCA9512B
Level shif
ting hot swa
pp
able I
2
C-bus and SMBus bus buffer
13. Package
outline
Fig 16.
Package
outline SOT96-1 (SO8)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(2)
(1)
eH
E
LL
p
QZ
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
0.7
0.6
0.7
0.3
8
0
o
o
0.25
0.1
0.25
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
1.0
0.4
SOT96-1
X
w
M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v
M
A
(A )
3
A
4
5
pin 1 index
1
8
y
076E03
MS-012
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.20
0.19
0.16
0.15
0.05
0.244
0.228
0.028
0.024
0.028
0.012
0.01
0.01
0.041
0.004
0.039
0.016
0
2.5
5 mm
scale
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
99-12-27
03-02-18
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
PCA9512ADP,118
Mfr. #:
Buy PCA9512ADP,118
Manufacturer:
NXP Semiconductors
Description:
Buffers & Line Drivers LEVSHFT I2C/SMBUS BUFF
Lifecycle:
New from this manufacturer.
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