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AMIS30532C5321G

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AMIS−30532
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Table 14. SPI CONTROL PARAMETER OVERVIEW
Symbol Description Status Value
DIRCTRL
Controls the direction of rotation (in combination
with logic level on input DIR)
<DIR> = 0
<DIRCTRL> = 0 CW motion (Note 15)
<DIRCTRL> = 1 CCW motion (Note 15)
<DIR> = 1
<DIRCTRL> = 0 CCW motion (Note 15)
<DIRCTRL> = 1 CW motion (Note 15)
NXTP Selects if NXT triggers on rising or falling edge
<NXTP> = 0 Trigger on rising edge
<NXTP> = 1 Trigger on falling edge
EMC[1:0]
Turn On – Turn−off Slopes of motor driver
(Note 14)
00 Very Fast
01 Fast
10 Slow
11 Very Slow
SLAT Speed load angle transparency bit
<SLAT> = 0 SLA is transparent
<SLAT> = 1 SLA is NOT transparent
SLAG Speed load angle gain setting
<SLAG> = 0 Gain = 0.5
<SLAG> = 1 Gain = 0.25
PWMF Enables doubling of the PWM frequency (Note 14)
<PWMF> = 0 Default Frequency
<PWMF> = 1 Double Frequency
PWMJ Enables jittery PWM
<PWMJ> = 0 Jitter disabled
<PWMJ> = 1 Jitter enabled
SM[2:0] Stepmode
000 1/32 Micro − Step
001 1/16 Micro − Step
010 1/8 Micro − Step
011 1/4 Micro − Step
100 Compensated Half Step
101 Uncompensated Half Step
110 Full Step
111 n.a.
SLP Enables sleep mode
<SLP> = 0 Active mode
<SLP> = 1 Sleep mode
MOTEN Activates the motor driver outputs
<MOTEN> = 0 Drivers disabled
<MOTEN> = 1 Drivers enabled
M[1:0] PWM Mode Control
00 Default PWM control
01 DCMin Mode 1
10 DCMin Mode 2
11 DCMin Mode 3
StrB[1:0]
PWM Strobe B Control: DON mask comparator
time (Note 16)
00 4 PWM clock cycles
01 8 PWM clock cycles
10 12 PWM clock cycles
11 19 PWM clock cycles
StrC
PWM Strobe C Control: Switch time top/bottom
regulation
<StrC> = 0 86% duty cycle PWM regulator
<StrC> = 1 75% duty cycle PWM regulator
StrE[1:0]
PWM Strobe E Control: Compensation bridge
active time (Note 16)
00 4 PWM clock cycles
01 8 PWM clock cycles
10 12 PWM clock cycles
11 19 PWM clock cycles
14.The typical values can be found in Table 5: DC Parameters and in Table 6: AC parameters
15.Depending on the wiring of the motor connections
16.The duration is depending on the selected PWM frequency
AMIS−30532
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26
CUR[4:0] Selects IMCmax peak. This is the peak or amplitude of the regulated current waveform in the motor coils.
Table 15. SPI CONTROL PARAMETER OVERVIEW CUR[4:0]
Current Range
(Note 18)
Index
CUR[4:0]
Current (mA)
(Note 17)
Current Range
(Note 18)
Index
CUR[4:0]
Current (mA)
(Note 17)
0
0 00000 66
2
16 10000 735
1 00001 135 17 10001 800
2 00010 189 18 10010 883
3 00011 200 19 10011 975
4 00100 221 20 10100 1077
5 00101 244 21 10101 1189
6 00110 269 22 10110 1255
7 00111 297
3
23 10111 1485
8 01000 328 24 11000 1625
1
9 01001 366 25 11001 1767
10 01010 400 26 11010 1950
11 01011 442 27 11011 2153
12 01100 488 28 11100 2378
13 01101 538 29 11101 2552
14 01110 594 30 11110 2775
15 01111 654 31 11111 3015
17.Typical current amplitude at T
J
= 125°C
18.Reducing the current over different current ranges might trigger overcurrent detection. See dedicated application note for solutions
SPI Status Register Description
All 4 SPI status registers have Read Access and are default to ”0” after power-on or hard reset.
Table 16. SPI STATUS REGISTERS
Address
Content
Structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
SR0 (04h) Data is not
latched
PAR TW CPfail WD OPENX OPENY − −
SR1 (05h) Data is
latched
PAR OVCXPT OVCXPB OVCXNT OVCXNB − − −
SR2 (06h) Data is
latched
PAR OVCYPT OVCYPB OVCYYNT OVCYNB TSD − −
SR3 (07h) Data is not
latched
PAR MSP[6:0]
Where:
R Read only mode access
Reset Status after power-on or hard reset
PAR Parity check
AMIS−30532
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27
Table 17. SPI STATUS FLAGS OVERVIEW
Mnemonic Flag
Length
(bit)
Related SPI Register Comment
Reset
State
CPFail Charge pump failure 1 Status Register 0 ‘0’ = no failure
‘1’ = failure: indicates that the charge pump does
not reach the required voltage level. Note 1
‘0’
MSP[6:0] Micro−step position 7 Status Register 3 Translator micro step position ‘0000000’
OPENX OPEN Coil X 1 Status Register 0 ‘1’ = Open coil detected ‘0’
OPENY OPEN Coil Y 1 Status Register 0 ‘1’ = Open coil detected ‘0’
OVCXNB OVer Current on X
H−bridge; MOTXN
terminal; Bottom
tran.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at bottom transistor XN−terminal
‘0’
OVCXNT OVer Current on X
H−bridge; MOTXN
terminal; Top
transist.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at top transistor XN−terminal
‘0’
OVCXPB OVer Current on X
H−bridge; MOTXP
terminal; Bottom
tran.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at bottom transistor XP−terminal
‘0’
OVCXPT OVer Current on X
H−bridge; MOTXP
terminal; Top
transist.
1 Status Register 1 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at top transistor XP−terminal
‘0’
OVCYNB OVer Current on Y
H−bridge; MOTYN
terminal; Bottom
tran.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at bottom transistor YN−terminal
‘0’
OVCYNT OVer Current on Y
H−bridge; MOTYN
terminal; Top
transist.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at top transistor YN−terminal
‘0’
OVCYPB OVer Current on Y
H−bridge; MOTYP
terminal; Bottom
tran.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at bottom transistor YP−terminal
‘0’
OVCYPT OVer Current on Y
H−bridge; MOTYP
terminal; Top
transist.
1 Status Register 2 ‘0’ = no failure
‘1’ = failure: indicates that over current is
detected at top transistor YP−terminal
‘0’
TSD Thermal shutdown 1 Status Register 2 ‘0’
TW Thermal warning 1 Status Register 0 ‘0’
WD Watchdog event 1 Status Register 0 ‘1’ = watchdog reset after time−out ‘0’
NOTE: WD − This bit indicates that the watchdog timer has not been cleared properly. If the master reads that WD is set to “1” after reset,
it means that a watchdog reset occurred (warm boot) instead of POR (cold boot). WD bit will be cleared only when the master
writes “0” to WDEN bit.
Table 18. ORDERING INFORMATION
Part No. Peak Current
Temperature
Range
Package Shipping
†
AMIS30532C5321RG 1600 mA
−40°C to 125°C
NQFP−32 (7 x 7 mm)
(Pb−Free)
Tape & Reel
AMIS30532C5321G 1600 mA
−40°C to 125°C
NQFP−32 (7 x 7 mm)
(Pb−Free)
Tube
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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AMIS30532C5321G

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Buy AMIS30532C5321G
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers Stepper Motor Driver 32 Pins
Lifecycle:
New from this manufacturer.
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