6.42
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
4
Recommended Operating
Temperature and Supply Voltage
(1,2)
Recommended DC Operating
Conditions
Absolute Maximum Ratings
(1)
NOTES:
1. These parameters are determined by device characterization, but are not
production tested.
2. C
OUT also references CI/O.
Capacitance
(1)
(TA = +25°C, f = 1.0MHZ)
Truth Table II—Address Counter Control
(1,2,3)
NOTES:
1. "H" = V
IH, "L" = VIL, "X" = Don't Care.
2. CE
0, LB, UB, and OE = VIL; CE1 and R/W = VIH.
3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle.
4. ADS and CNTRST are independent of all other signals including CE
0, CE1, UB and LB.
5. The address counter advances if CNTEN = V
IL on the rising edge of CLK, regardless of all other signals including CE0, CE1, UB and LB.
NOTES:
1. V
IL > -1.5V for pulse width less than 10 ns.
2. V
TERM must not exceed VDD + 0.3V.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM must not exceed VDD + 0.3V for more than 25% of the cycle time or 10ns
maximum, and is limited to
< 20mA for the period of VTERM > VDD + 0.3V.
3. Ambient Temperature Under DC Bias. No AC Conditions. Chip Deselected.
NOTES:
1. Industrial temperature: for specific speeds, packages and powers contact your
sales office.
2. This is the parameter T
A. This is the "instant on" case temperature.
External
Address
Previous
Internal
Address
Internal
Address
Used CLK
ADS CNTEN CNTRST
I/O
(3)
MODE
An X An
L
(4)
XHD
I/O
(n) External Address Used
XAnAn + 1
H L
(5)
HD
I/O
(n+1) Counter Enabled—Internal Address generation
X An + 1 An + 1
HH HD
I/O
(n+1) External Address Blocked—Counter disabled (An + 1 reused)
XXA
0
XX L
(4)
D
I/O
(0) Counter Reset to Address 0
3743 tbl 03
Grade
Ambient
Temperature GND VDD
Commercial 0
O
C to +70
O
C0V3.3V
+
0.3V
Industrial -40
O
C to +85
O
C0V 3.3V
+
0.3V
3743 tbl 04
Symbol Parameter Min. Typ. Max. Unit
V
DD
Supply Voltage 3.0 3.3 3.6 V
V
SS
Ground 0 0 0 V
V
IH
Input High Voltage 2.2
____
V
DD
+0.3V
(2 )
V
V
IL
Input Low Voltage -0.3
(1 )
____
0.8 V
3743 tbl 05
Symbol Rating Commercial
& Industrial
Unit
V
TERM
(2)
Terminal Voltage
with Respect to
GND
-0.5 to +4.6 V
T
BIAS
(3)
Temperature Under Bias -55 to +125
o
C
T
STG
StorageTemperature -65 to +150
o
C
T
JN
Junction Temperature +150
o
C
I
OUT
DC Output Current 50 mA
3743 tbl 06
Symbol Parameter Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 0V 9 pF
C
OUT
(2)
Output Capacitance V
OUT
= 0V 10 pF
3743 tbl 07
6.42
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
5
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(3,6)
(VDD = 3.3V ± 0.3V)
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VDD = 3.3V ± 0.3V)
NOTE:
1. At V
DD < 2.0V input leakages are undefined.
NOTES:
1. At f = f
MAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of V
SS to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 90mA (Typ).
5. CE
X = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDD - 0.2V
CE
X > VDD - 0.2V means CE0X > VDD - 0.2V or CE1X < 0.2V
'X' represents "L" for left port or "R" for right port.
6. 'X' in part numbers indicate power rating (S or L).
Symbol Parameter Test Conditions
70V9279/69S 70V9279/69L
UnitMin. Max. Min. Max.
|I
LI
| Input Leakage Current
(1)
V
DD
= 3.6V, V
IN
= 0V t
o
V
DD
___
10
___
A
|I
LO
| Output Leakage Current
CE0 = V
IH
or CE
1
= V
IL
, V
OUT
= 0V t
o
V
DD
___
10
___
A
V
OL
Output Low Voltage I
OL
= +4mA
___
0.4
___
0.4 V
V
OH
Output High Voltage I
OH
= -4mA 2.4
___
2.4
___
V
3743 tbl 08
70V9279/69X6
Com'l Only
70V9279/69X7
Com'l
& Ind
70V9279/69X9
Com'l Only
Symbol Parameter Test Condition Version Typ.
(4)
Max. Typ.
(4)
Max. Typ.
(4)
Max. Unit
I
DD
Dynamic
Operating
Current (Both
Ports Active)
CE
L
and CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L S
L
220
220
395
350
200
200
335
290
180
180
260
225
mA
IND S
L
____
____
____
____
200
200
370
335
____
____
____
____
I
SB1
Standby
Current (Both
Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
f = f
MAX
(1)
COM'L S
L
70
70
145
130
60
60
115
100
50
50
75
65
mA
IND S
L
____
____
____
____
60
60
130
115
____
____
____
____
I
SB2
Standby
Current (One
Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(1)
COM'L S
L
150
150
280
250
130
130
240
210
110
110
170
150
mA
IND S
L
____
____
____
____
130
130
265
240
____
____
____
____
I
SB3
Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports CE
L
and
CE
R
> V
DD
- 0.2V,
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, f = 0
(2)
COM'L S
L
1.0
0.4
5
3
1.0
0.4
5
3
1.0
0.4
5
3
mA
IND S
L
____
____
____
____
1.0
0.4
20
15
____
____
____
____
I
SB4
Full Standby
Current (One
Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DD
- 0.2V
(5)
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, Active Port,
Outputs Disabled, f = f
MAX
(1)
COM'L S
L
140
140
270
240
120
120
230
200
100
100
160
140
mA
IND S
L
____
____
____
____
120
120
255
230
____
____
____
____
3743 tbl 09a
6.42
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
6
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(3,6)
(VDD = 3.3V ± 0.3V)(Cont'd)
NOTES:
1. At f = f
MAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of V
SS to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 90mA (Typ).
5. CE
X = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDD - 0.2V
CE
X > VDD - 0.2V means CE0X > VDD - 0.2V or CE1X < 0.2V
'X' represents "L" for left port or "R" for right port.
6. 'X' in part numbers indicate power rating (S or L).
70V9279/69X12
Com'l Only
70V9279/69X15
Com'l Only
Symbol Parameter Test Condition Version Typ.
(4)
Max. Typ.
(4)
Max. Unit
I
DD
Dynamic
Operating
Current (Both
Ports Active)
CE
L
and CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L S
L
150
150
240
205
130
130
220
185
mA
IND S
L
____
____
____
____
____
____
____
____
I
SB1
Standby
Current (Both
Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
f = f
MAX
(1)
COM'L S
L
40
40
65
50
30
30
55
35
mA
IND S
L
____
____
____
____
____
____
____
____
I
SB2
Standby
Current (One
Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(1)
COM'L S
L
100
100
160
140
90
90
150
130
mA
IND S
L
____
____
____
____
____
____
____
____
I
SB3
Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports CE
L
and
CE
R
> V
DD
- 0.2V,
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, f = 0
(2)
COM'L S
L
1.0
0.4
5
3
1.0
0.4
5
3
mA
IND S
L
____
____
____
____
____
____
____
____
I
SB4
Full Standby
Current (One
Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DD
- 0.2V
(5)
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, Active Port,
Outputs Disabled, f = f
MAX
(1)
COM'L S
L
90
90
150
130
80
80
140
120
mA
IND S
L
____
____
____
____
____
____
____
____
3743 tbl 09b

70V9269S15PRF

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 16KX16 SYNC PIPE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union