NCP367
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7
TYPICAL OPERATING CHARACTERISTICS
Vin
Vout /Flag
Vin
Vout
V
in
V
out
/Flag
t
on
t
start
/FLAG
Vout
Vin
t
off
t
stop
/FLAG
V
out
V
in
t
on
t
start
/FLAG
V
in
/FLAG
Figure 3. Hot Plug−in from 0 to 5 V,
t
on
and t
start
Figure 4. Overvoltage from 5 to 8 V,
t
off
and t
stop
Figure 5. Retrieve Normal Operation,
t
on
and t
start
Figure 6. Overvoltage from 0 to 10 V
Figure 7. Battery Overvoltage, Deglitch Time
V
in
V
in
V
out
/Flag
V
in
V
out
/Flag
V
bat
VBat
DEG
NCP367
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8
TYPICAL OPERATING CHARACTERISTICS
Figure 8. UVLO and Hysteresis Figure 9. OVLO and Hysteresis vs. Temperature
(5.6 V version)
Figure 10. V
BAT
Threshold and Hysteresis vs.
Temperature
Figure 11. V
BAT
Pin Leakage vs. Temperature
4.40
0−50 50 100 125
OV
BAT
(V)
TEMPERATURE (°C)
4.35
4.30
4.25
4.20
4.15
4.10
1.92
0−50 50 100 125
UVLO (V)
TEMPERATURE (°C)
1.90
1.88
1.86
1.84
1.82
1.80
UVLO + hysteresis
2.00
UVLO
1.94
1.96
5.62
0−50 50 100 125
OVLO (V)
TEMPERATURE (°C)
5.60
5.58
5.56
5.54
5.52
5.50
5.64
5.66
0−50 50 100 125
VBAT
LEAK
(nA)
TEMPERATURE (°C)
20
15
10
5
0
1.98
25−25 75 25−25 75
OVLO
2525 75 25−25 75
OVLO − Hysteresis
NCP367
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9
APPLICATION INFORMATION
Operation
The NCP367 is an integrated IC which offers a complete
protection of the portable devices during the Li ion battery
charge.
First, the input pin is protected up to +30 V, protecting
the down stream system (charger, transceiver, system...)
against the power supply transients such as inrush current
or defective functionality. Additional protection level is
offered with the overcurrent block which eliminates
current peak or opens the charge path if an overcurrent
default appears.
More of that, the battery voltage is monitored all along
the input power supply is connected, allowing to open
charge path if Li ion battery voltage exceeds 4.3 V, caused
by CCCV charger or battery pack fault.
The integrated pass element (PMOS FET) is sized to
support very high charge DC current up to 2.3 A. The
overcurrent threshold can be externally adjusted with a
pull−down resistor and gain select pin is available to divide
current limit threshold with internal fixed gain. Allowing
to adjust with logic pin the overcurrent threshold if
USB/500 mA or WA/1.5 A is detected, without changing
R
ILIM
resistor, in example.
Undervoltage, Overvoltage, Overcurrent and thermal
faults are signalized thanks to the open drain FLAG pin, by
pulling its down.
Undervoltage Lockout (UVLO)
To ensure proper operation under any conditions, the
device has a built−in undervoltage lock out (UVLO)
circuit. During Vin positive going slope, the output remains
disconnected from input until Vin voltage is above 1.85 V
plus hysteresis nominal. This circuit has a 80 mV
hysteresis to provide noise immunity to transient condition.
Overvoltage Lockout (OVLO)
To protect connected systems on Vout pin from
overvoltage, the device has a built−in overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output
remains disabled as long as the input voltage exceeds this
threshold.
FLAG output is tied to low as long as Vin is higher than
OVLO. This circuit has a 100 mV hysteresis to provide
noise immunity to transient conditions.
FLAG Output
NCP367 provides a FLAG output, which alerts external
systems that a fault has occurred.
This pin is tied to low as soon as the OVLO, OV
BAT
, I
OCP
or internal temperature thresholds are exceeded and
remains low until between minimum driving voltage and
UVLO threshold. When Vin level recovers normal
condition, FLAG is held high. The pin is an open drain
output, thus a pull up resistor (typically 1 MW − Minimum
10 kW) must be provided to V
CC
. FLAG pin is an open drain
output, which is able to support 1 mA maximum.
EN Input
To enable normal operation, the EN pin shall be forced
to low or connected to ground. A high level on the pin,
disconnects OUT pin from IN pin. EN does not overdrive
a UVLO or OVLO fault.
Overcurrent Protection (OCP)
This device integrates the overcurrent protection
function, from wall adapter to battery. That means the
current across the internal PMOS is regulated and cut when
the value, set by external RSEL resistor, exceeds I
LIM
longer than t
REG
.
An internal resistor is placed in series with the pin
allowing to have a maximum OCP value when I
LIM
pin is
directly connected to GND.
By adding external resistors in series with I
LIM
and GND,
the OCP value is decreased.
An additional logic pin, GS (gain select), is very useful
in case of different charge rate is necessary (Wall adapter
and USB, for example).
By setting GS to 0.4 V, overcurrent thresholds are
depending on R select resistor, which is connect between
pin 4 and GND. When the GS pin is tied to 1.2 V (high logic
level) the preselected current limit is divided by 2.75. Due

NCP367DPMUEETBG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Battery Management OCP OVP USB AND AC/DC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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