1. General description
The 74HC574; 74HCT574 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.
The 74HC574; 74HCT574 are octal D-type flip-flops featuring separate D-type inputs for
each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an output
enable (OE
) input are common to all flip-flops. The 8 flip-flops will store the state of their
individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH
CP transition. When OE
is LOW the contents of the 8 flip-flops are available at the
outputs. When OE
is HIGH, the outputs go to the high-impedance OFF-state. Operation of
the OE
input does not affect the state of the flip-flops.
The 74HC574; 74HCT574 is functionally identical to:
• 74HC564: but has non-inverting outputs
• 74HC374; 74HCT374: but has a different pin arrangement
2. Features and benefits
3-state non-inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 6 — 26 January 2015 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC574N 40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT574N
74HC574D 40 C to +125 C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74HCT574D
