IDT71124S12YI8 Datasheet 71124S12YG8, 71124S15YGI8, 71124S20YG | P1-P3

APRIL 2013APRIL 2013

APRIL 2013

DSC-3514/11

1

Features

◆◆

◆

128K x 8 advanced high-speed CMOS static RAM

◆◆

◆

JEDEC revolutionary pinout (center power/GND) for

reduced noise.

◆◆

◆

Equal access and cycle times

– Commercial: 12/15/20ns

– Industrial: 15/20ns

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One Chip Select plus one Output Enable pin

◆◆

◆

Bidirectional inputs and outputs directly TTL-compatible

◆◆

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Low power consumption via chip deselect

◆◆

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Available in a 32-pin 400 mil Plastic SOJ.

Functional Block Diagram

Description

The IDT71124 is a 1,048,576-bit high-speed static RAM organized as

128K x 8. It is fabricated using high-performance, high-reliability CMOS

technology. This state-of-the-art technology, combined with innovative

circuit design techniques, provides a cost-effective solution for high-speed

memory needs. The JEDEC centerpower/GND pinout reduces noise

generation and improves system performance.

The IDT71124 has an output enable pin which operates as fast as 6ns,

with address access times as fast as 12ns available. All bidirectional inputs

and outputs of the IDT71124 are TTL-compatible and operation is from

a single 5V supply. Fully static asynchronous circuitry is used; no clocks

or refreshes are required for operation.

The IDT71124 is packaged in a 32-pin 400 mil Plastic SOJ.

ADDRESS

DECODER

1,048,576-BIT

MEMORY ARRAY

I/O CONTROL

•

A

0

A

16

3514 drw 01

8

I/O

0

-I/O

7

•

8

•

CONTROL

LOGIC

WE

OE

CS

,

CMOS Static RAM

1 Meg (128K x 8-Bit)

Revolutionary Pinout

IDT71124

6.42

2

IDT71124 CMOS Static RAM

1 Meg (128K x 8-bit) Revolutionary Pinout Commercial and Industrial Temperature Ranges

Capacitance

(TA = +25°C, f = 1.0MHz)

Symbol Parameter

(1 )

Conditions Max. Unit

C

IN

Input Capacitance V

IN

= 3dV 8 pF

C

I/O

I/O Capacitance V

OUT

= 3dV 8 pF

3514 tbl 03

Recommended DC Operating

Conditions

NOTE:

1. This parameter is guaranteed by device characterization, but is not production tested.

Symbol Parameter Min. Typ. Max. Unit

V

CC

Supply Voltage 4.5 5.0 5.5 V

GND Ground 0 0 0 V

V

IH

Input High Voltage 2.2

____

V

CC

+0.5 V

V

IL

Input Low Voltage -0.5

(1)

____

0.8 V

3514 tbl 05

Grade Temperature GND V

CC

Commercial 0°C to +70°C 0V 5.0V ± 10%

Industrial –40°C to +85°C 0V 5.0V ± 10%

3514 tbl 04

Recommended Operating

Temperature and Supply Voltage

Pin Configuration

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliabilty.

2. VTERM must not exceed Vcc + 0.5V.

Truth Table

(1,2)

SOJ

Top View

5

6

7

8

9

10

11

12

A

0

A1

A2

1

2

3

4

32

31

30

29

28

27

26

25

24

23

22

21

A15

A3

CS

I/O

1

VCC

A14

OE

I/O

7

I/O6

GND

I/O

5

3514 drw 02

GND

13 20

14 19

15 18

16

A

7

17

I/O2

I/O3

WE

A

4

A5

A6

A12

A11

A10

A9

A8

SO32-3

I/O0

A16

A13

VCC

I/O4

,

NOTES:

1. H = VIH, L = VIL, x = Don't care.

2. VLC = 0.2V, VHC = VCC -0.2V.

3. Other inputs ≥ VHC or ≤ VLC.

CS OE WE I/O Function

LLHDATA

OUT

Read Data

LXLDATA

IN

Write Data

L H H High-Z Output Disabled

H X X High-Z Deselected - Standby (I

SB

)

V

HC

(3 )

X X High-Z Deselected - Standby (I

SB1

)

3514 tbl 01

Absolute Maximum Ratings

(1)

Symbol Rating Value Unit

V

TERM

(2)

Terminal Voltage with

Respect to GND

-0.5 to +7.0

(2 )

V

T

A

Operating Temperature 0 to +70

o

C

T

BIAS

Temperature

Under Bias

-55 to +125

o

C

T

STG

Storage

Temperature

-55 to +125

o

C

P

T

Power Dissipation 1.25 W

I

OUT

DC Output Current 50 mA

3514 tbl 02

6.42

IDT 71124 CMOS Static RAM

1 Meg (128K x 8-bit) Revolutionary Pinout Commercial and Industrial Temperature Ranges

3

3514 drw 03

480Ω

255Ω30pF

DATA

OUT

5V

.

*Including jig and scope capacitance.

Figure 2. AC Test Load

(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)

Figure 1. AC Test Load

AC Test Conditions

DC Electrical Characteristics

(1)

(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)

3514 drw 04

480Ω

255Ω5pF*

DATA

OUT

5V

.

DC Electrical Characteristics

(VCC = 5.0V ± 10%, Commercial and Industrial Temperature Ranges)

Symbol Parameter Test Conditions Min. Max. Unit

|I

LI

| Input Leakage Current V

CC

= Max., V

IN

= GND to V

CC

___

5µA

|I

LO

| Output Leakage Current V

CC

= Max., CS = V

IH

, V

OUT

= GND to V

CC

___

5µA

V

OL

Output Low Voltage I

OL

= 8mA, V

CC

= Min.

___

0.4 V

V

OH

Output High Voltage I

OH

= –4mA, V

CC

= Min. 2.4

___

V

3514 tbl 06

NOTES:

1. All values are maximum guaranteed values.

2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.

71124S12 71124S15 71124S20

Symbol Parameter Com'l. Com'l. Ind. Com'l. Ind. Unit

I

CC

Dynamic Operating Current

CS <

V

IL

, Outputs Open, V

CC

= Max., f = f

MAX

(2)

160 155 155 140 140 mA

I

SB

Standby Power Supply Current (TTL Level)

CS >

V

IH

, Outputs Open, V

CC

= Max., f = f

MAX

(2)

40 40 40 40 40 mA

I

SB1

Full Standby Power Supply Current (CMOS Level)

CS >

V

HC

, Outputs Open, V

CC

= Max., f = 0

(2)

V

IN

< V

LC

or V

IN

> V

HC

10 10 10 10 10 mA

3514 tbl 07

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

AC Test Load

GND to 3.0V

3ns

1.5V

See Figure 1 and 2

3514 tbl 08

AC Test Loads

IDT71124S12YI8

IDT71124S12YI8

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