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LTC3542EDC#TRMPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
LTC3542
13
3542fa
Figure 3a. Typical Application
Figure 3b. Layout Diagram
Figure 3c. Effi ciency Curve
Figure 3d. Load Step
V
IN
LTC3542
RUN
R1
75k
*SUMIDA CDRH2D18HD-2R2NC
**TDK C2012X5R0J106M
3542 F03a
R2
150k
C
F
22pF
L*
2.2μH
C
IN
**
10μF
C
OUT
**
10μF
SW
V
IN
2.7V TO 5.5V
V
OUT
1.8V
500mA
V
FB
MODE/SYNC
GND
1
2
3
V
FB
R1
V
IN
V
IN
GND
3542 F03b
C
IN
6
5
GND
4
RUN
GND
GND
VIA TO V
OUT
MODE/
SYNC
SW
R2
C
F
C
OUT
L
V
OUT
OUTPUT CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3542 G17
0
1
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
OUT
= 1.8V
Burst Mode OPERATION
FIGURE 3a CIRCUIT
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 0mA TO 500mA
FIGURE 3a CIRCUIT
20μs/DIV
3542 G06
I
LOAD
500mA/DIV
APPLICATIONS INFORMATION
LTC3542
14
3542fa
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
2.00 ±0.1
0
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.75 ±0.05
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 –
0.25 ± 0.05
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.675 ±0.05
2.50 ±0.05
PACKAGE
OUTLINE
0.50 BSC
PACKAGE DESCRIPTION
LTC3542
15
3542fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
PACKAGE DESCRIPTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

LTC3542EDC#TRMPBF

Mfr. #:
Buy LTC3542EDC#TRMPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 500mA, 2.25MHz Sync Buck DC/DC Conv
Lifecycle:
New from this manufacturer.
Delivery:
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