© 2001 Fairchild Semiconductor Corporation DS011657 www.fairchildsemi.com
December 1993
Revised January 2001
SCAN182245A Non-Inverting Transceiver with 25
Ω
Series Resistor Outputs
SCAN182245A
Non-Inverting Transceiver
with 25
Ω Series Resistor Outputs
General Description
The SCAN182245A is a high performance BiCMOS bidi-
rectional line driver featuring separate data inputs orga-
nized into dual 9-bit bytes with byte-oriented output enable
and direction control signals. This device is compliant with
IEEE 1149.1 Standard Test Access Port and Boundary
Scan Architecture with the incorporation of the defined
boundary-scan test logic and test access port consisting of
Test Data Input (TDI), Test Data Out (TDO), Test Mode
Select (TMS), and Test Clock (TCK).
Features
■ High performance BiCMOS technology
■ 25
Ω series resistors in outputs eliminate the need for
external terminating resistors
■ Dual output enable control signals
■ 3-STATE outputs for bus-oriented applications
■ 25 mil pitch SSOP (Shrink Small Outline Package)
■ IEEE 1149.1 (JTAG) Compliant
■ Includes CLAMP, IDCODE and HIGHZ instructions
■ Additional instructions SAMPLE-IN, SAMPLE-OUT and
EXTEST-OUT
■ Power Up 3-STATE for hot insert
■ Member of Fairchild’s SCAN Products
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number
Package
Number
Package Description
SCAN182245ASSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
SCAN182245AMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
A1
(0–8)
Side A1 Inputs or 3-STATE Outputs
B1
(0–8)
Side B1 Inputs or 3-STATE Outputs
A2
(0–8)
Side A2 Inputs or 3-STATE Outputs
B2
(0–8)
Side B2 Inputs or 3-STATE Outputs
G1
, G2 Output Enable Pins (Active LOW)
DIR1, DIR2 Direction of Data Flow Pins
