TSL2560, TSL2561
LIGHT-TO-DIGITAL CONVERTER
TAOS059N − MARCH 2009
4
r
r
Copyright E 2009, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
Operating Characteristics, High Gain (16), V
DD
= 3 V, T
A
= 25C, (unless otherwise noted) (see
Notes 2, 3, 4, 5)
PARAMETER TEST CONDITIONS CHANNEL
TSL2560T, FN, & CL
TSL2561T, FN & CL
TSL2560CS, TSL2561CS
UNIT
PARAMETER
TEST
CONDITIONS
CHANNEL
MIN TYP MAX MIN TYP MAX
UNIT
f
osc
Oscillator frequency 690 735 780 690 735 780 kHz
E 0 T 402 ms
Ch0 0 4 0 4
counts
Dark ADC count value E
e
= 0, T
int
= 402 ms
Ch1 0 4 0 4
counts
T 178 ms
Ch0 65535 65535
T
int
> 178 ms
Ch1 65535 65535
Full scale ADC count
T 101 ms
Ch0 37177 37177
counts
value (Note 6)
T
int
= 101 ms
Ch1 37177 37177
counts
T137ms
Ch0 5047 5047
T
int
= 13.7 ms
Ch1 5047 5047
λ
p
= 640 nm, T
in
t
= 101 ms
Ch0 750 1000 1250
λ
p
=
640
nm
,
T
int
=
101
ms
E
e
= 36.3 μW/cm
2
Ch1 200
counts
λ
p
= 940 nm, T
in
t
= 101 ms
Ch0 700 1000 1300
counts
λ
p
=
940
nm
,
T
int
=
101
ms
E
e
= 119 μW/cm
2
Ch1 820
ADC count value
λ
p
= 640 nm, T
in
t
= 101 ms
Ch0 750 1000 1250
λ
p
=
640
nm
,
T
int
=
101
ms
E
e
= 41 μW/cm
2
Ch1 190
counts
λ
p
= 940 nm, T
in
t
= 101 ms
Ch0 700 1000 1300
counts
λ
p
=
940
nm
,
T
int
=
101
ms
E
e
= 135 μW/cm
2
Ch1 850
λ 640 nm T 101 ms
015
020
025
014
019
024
ADC count value ratio:
λ
p
= 640 nm, T
int
= 101 ms 0.15 0.20 0.25 0.14 0.19 0.24
λ 940 nm T 101 ms
069
082
095
070
085
1
λ
p
= 940 nm, T
int
= 101 ms 0.69 0.82 0.95 0.70 0.85 1
λ 640 nm T 101 ms
Ch0 27.5 24.4
R
λ
p
= 640 nm, T
int
= 101 ms
Ch1 5.5 4.6
counts/
(μW/
R
e
Irradiance responsivity
λ 940 nm T 101 ms
Ch0 8.4 7.4
(μW/
c
m
2
)
λ
p
= 940 nm, T
int
= 101 ms
Ch1 6.9 6.3
cm
2
)
Fluorescent li
g
ht source:
Ch0 36 35
R
Fluorescent
light
source:
T
int
= 402 ms
Ch1 4 3.8
counts/
R
v
Illuminance responsivity
Incandescent li
g
ht source:
Ch0 144 129
counts/
lux
Incandescent
light
source:
T
int
= 402 ms
Ch1 72 67
ADC count value ratio:
Fluorescent light source:
T
int
= 402 ms
0.11 0.11
Ch1/Ch0
Incandescent li
g
ht source:
05
052
Incandescent
light
source:
T
int
= 402 ms
0.5 0.52
Fluorescent li
g
ht source:
Ch0 2.3 2.2
R
Illuminance responsivit
,
Fluorescent
light
source:
T
int
= 402 ms
Ch1 0.25 0.24
counts/
R
v
,
low gain mode (Note 7)
Incandescent li
g
ht source:
Ch0 9 8.1
counts/
lux
Incandescent
light
source:
T
int
= 402 ms
Ch1 4.5 4.2
(Sensor Lux) /
Fluorescent light source:
T
int
= 402 ms
0.65 1 1.35 0.65 1 1.35
(actual Lux), high gain
mode (Note 8)
Incandescent light source:
T
int
= 402 ms
0.60 1 1.40 0.60 1 1.40
TSL2560, TSL2561
LIGHT-TO-DIGITAL CONVERTER
TAOS059N − MARCH 2009
5
The LUMENOLOGY r Company
r
r
Copyright E 2009, TAOS Inc.
www.taosinc.com
NOTES: 2. Optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. Visible 640 nm LEDs
and infrared 940 nm LEDs are used for final product testing for compatibility with high-volume production.
3. The 640 nm irradiance E
e
is supplied by an AlInGaP light-emitting diode with the following characteristics: peak wavelength
λp = 640 nm and spectral halfwidth Δλ½ = 17 nm.
4. The 940 nm irradiance E
e
is supplied by a GaAs light-emitting diode with the following characteristics: peak wavelength
λp = 940 nm and spectral halfwidth Δλ½ = 40 nm.
5. Integration time T
int
, is dependent on internal oscillator frequency (f
osc
) and on the integration field value in the timing register as
described in the Register Set section. For nominal f
osc
= 735 kHz, nominal T
int
= (number of clock cycles)/f
osc
.
Field value 00: T
int
= (11 × 918)/f
osc
= 13.7 ms
Field value 01: T
int
= (81 × 918)/f
osc
= 101 ms
Field value 10: T
int
= (322 × 918)/f
osc
= 402 ms
Scaling between integration times vary proportionally as follows: 11/322 = 0.034 (field value 00), 81/322 = 0.252 (field value 01),
and 322/322 = 1 (field value 10).
6. Full scale ADC count value is limited by the fact that there is a maximum of one count per two oscillator frequency periods and also
by a 2-count offset.
Full scale ADC count value = ((number of clock cycles)/2 − 2)
Field value 00: Full scale ADC count value = ((11
× 918)/2 − 2) = 5047
Field value 01: Full scale ADC count value = ((81 × 918)/2 − 2) = 37177
Field value 10: Full scale ADC count value = 65535, which is limited by 16 bit register. This full scale ADC count value is reached
for 131074 clock cycles, which occurs for T
int
= 178 ms for nominal f
osc
= 735 kHz.
7. Low gain mode has 16 lower gain than high gain mode: (1/16 = 0.0625).
8. The sensor Lux is calculated using the empirical formula shown on p. 22 of this data sheet based on measured Ch0 and Ch1 ADC
count values for the light source specified. Actual Lux is obtained with a commercial luxmeter. The range of the (sensor Lux) / (actual
Lux) ratio is estimated based on the variation of the 640 nm and 940 nm optical parameters. Devices are not 100% tested with
fluorescent or incandescent light sources.
TSL2560, TSL2561
LIGHT-TO-DIGITAL CONVERTER
TAOS059N − MARCH 2009
6
r
r
Copyright E 2009, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
AC Electrical Characteristics, V
DD
= 3 V, T
A
= 25C (unless otherwise noted)
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
t
(CONV)
Conversion time 12 100 400 ms
f
Clock frequency (I
2
C only) 0 400 kHz
f
(SCL)
Clock frequency (SMBus only) 10 100 kHz
t
(BUF)
Bus free time between start and stop condition 1.3 μs
t
(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6 μs
t
(SUSTA)
Repeated start condition setup time 0.6 μs
t
(SUSTO)
Stop condition setup time 0.6 μs
t
(HDDAT)
Data hold time 0 0.9 μs
t
(SUDAT)
Data setup time 100 ns
t
(LOW)
SCL clock low period 1.3 μs
t
(HIGH)
SCL clock high period 0.6 μs
t
(TIMEOUT)
Detect clock/data low timeout (SMBus only) 25 35 ms
t
F
Clock/data fall time 300 ns
t
R
Clock/data rise time 300 ns
C
i
Input pin capacitance 10 pF
Specified by design and characterization; not production tested.

TSL2561T

Mfr. #:
Manufacturer:
ams
Description:
Light to Digital Converters Light to Digital with I2C
Lifecycle:
New from this manufacturer.
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