71256SA20YG8

NOVEMBER 2014
DSC-2948/11
1
©2014 Integrated Device Technology, Inc.
Features
32K x 8 advanced high-speed CMOS static RAM
Commercial (0° to 70°C) and Industrial (-40° to 85°C)
temperature options
Equal access and cycle times
Commercial: 12ns
Commercial and Industrial: 15/20/25ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
TTL-compatible
Low power consumption via chip deselect
Commercial product available in 28-pin 300-mil Plastic DIP,
300 mil Plastic SOJ and TSOP packages
Industrial product available in 28-pin 300 mil Plastic SOJ
and TSOP packages
Description
The IDT71256SA is a 262,144-bit high-speed Static RAM
organized as 32K x 8. It is fabricated using high-performance, high-
reliability CMOS technology. This state-of-the-art technology, com-
bined with innovative circuit design techniques, provides a cost-
effective solution for high-speed memory needs.
The IDT71256SA has an output enable pin which operates as fast
as 6ns, with address access times as fast as 12ns. All bidirectional
inputs and outputs of the IDT71256SA are TTL-compatible and
operation is from a single 5V supply. Fully static asynchronous
circuitry is used, requiring no clocks or refresh for operation.
The IDT71256SA is packaged in 28-pin 300-mil Plastic DIP, 28-
pin 300 mil Plastic SOJ and TSOP.
Functional Block Diagram
CMOS Static RAM
256K (32K x 8-Bit)
IDT71256SA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
I/O
0-
I/O
7
CS
WE
OE
8 8
CONTROL
LOGIC
I/O CONTROL
262,144-BIT
MEMORY
ARRAY
ADDRESS
DECODER
2948 drw 01
,
2
IDT71256SA
CMOS Static RAM 256K (32K x 8-Bit) Commercial and Industrial Temperature Ranges
Absolute Maximum Ratings
(1)
Pin Configurations
DIP/SOJ
Top View
Recommended Operating
Temperature and Supply Voltage
Recommended DC Operating
Conditions
Truth Table
(1,2)
TSOP
Top View
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
Symbol Rating Value Unit
V
CC
Supply Voltage
Relative to GND
-0.5 to +7.0 V
V
TE RM
Terminal Voltage
Relative to GND
-0.5 to V
CC
+0.5 V
T
BIAS
Temperature Under Bias -55 to +125
o
C
T
STG
Storage Temperature -55 to +125
o
C
P
T
Power Dissipation 1.0 W
I
OUT
DC Output Current 50 mA
2948 tbl 02
NOTES:
1. H = VIH, L = VIL, x = Don't care.
2. VLC = 0.2V, VHC = VCC –0.2V.
3. Other inputs VHC or VLC.
CS OE WE
I/O
Function
LLHDATA
OUT
Read Data
LXLDATA
IN
Write Data
L H H High-Z Outputs Disabled
H X X High-Z Deselected - Standby (I
SB
)
V
HC
(3 )
X X High-Z Deselected - Standby (I
SB1
)
2948 tbl 03
Grade Temperature GND Vcc
Commercial 0
O
C to +70
O
C 0V 4.5V ± 5.5V
Industrial -40
O
C to +85
O
C 0V 4.5V ± 5.5V
2948 tbl 01
NOTE:
1. VIL (min.) = –1.5V for pulse width less than 10ns, once per cycle.
Symbol Parameter Min. Typ. Max. Unit
V
CC
Supply Voltage 4.5 5.0 5.5 V
GND Ground 0 0 0 V
V
IH
Input High Voltage 2.2
____
V
CC
+0.5 V
V
IL
Input Low Voltage -0.5
(1)
____
0.8 V
2948 tbl 04
WE
CS
2948 drw 02
5
6
7
8
9
10
11
12
GND
1
2
3
4
24
23
22
21
20
19
18
17
SO28
P28
13
14
28
27
26
25
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
V
CC
A
14
A
13
A
8
A
10
A
11
OE
A
12
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
A
9
16
15
2948 drw 02a
22
23
24
25
26
27
28
1
2
3
4
5
7
6
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A
10
CS
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
SO28
OE
A
11
A
9
A
8
A
13
A
14
A
7
A
6
A
5
A
4
A
3
A
12
WE
V
CC
,
6.42
IDT71256SA
CMOS Static RAM 256K (32K x 8-Bit) Commercial and Industrial Temperature Ranges
3
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
Figure 1. AC Test Load
*Including jig and scope capacitance.
DC Electrical Characteristics
(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC–0.2V)
AC Test Conditions
Capacitance
(TA = +25°C, f = 1.0MHz, SOJ package)
DC Electrical Characteristics
(VCC = 5.0V ± 10%)
2948 drw 03
480Ω
255Ω30pF*
DATA
OUT
5V
,
2948 drw 04
480Ω
255Ω5pF*
DATA
OUT
5V
.
Symbol Parameter Test Conditions
IDT71256SA
UnitMin. Max.
|I
LI
| Input Leakage Current V
CC
= Max., V
IN
=
GND to V
CC
___
A
|I
LO
| Output Leakage Current V
CC
= Max., CS = V
IH
, V
OUT
= GND to V
CC
___
A
V
OL
Output Low Voltage I
OL
= 8mA, V
CC
= Min.
___
0.4 V
V
OH
Output High Voltage I
OH
= -4mA, V
CC
= Min. 2.4
___
V
2948 tbl 05
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
Symbol Parameter 71256SA12 71256SA15 71256SA20 71256SA25 Unit
I
CC
Dynamic Operating Current
CS <
VIL, Outputs Open, VCC = Max., f = fMAX
(2)
160 150 145 145 mA
I
SB
Standby Power Supply Current (TTL Level)
CS >
VIH, Outputs Open, VCC = Max., f = fMAX
(2)
50 40 40 40 mA
I
SB1
Standby Power Supply Current (CMOS Level)
CS >
VHC, Outputs Open, VCC = Max., f = 0
(2)
,
V
IN < VLC or VIN > VHC
15 15 15 15 mA
2948 tbl 06
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
3ns
1.5V
1.5V
See Figures 1 and 2
2948 tbl 07
NOTE:
1. This parameter is guaranteed by device characterization, but not production
tested.
Symbol Parameter
(1)
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 7 pF
C
I/O
I/O Capacitance V
OUT
= 3dV 7 pF
2948 tbl 08

71256SA20YG8

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 32Kx8 ASYNCHRONOUS 5.0V STATIC RAM
Lifecycle:
New from this manufacturer.
Delivery:
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