13
LT1579
A small capacitor placed in parallel with the top resistor
(R2) of the output divider is necessary for stability and
transient performance of the adjustable LT1579. The
impedance of C
FB
at 10kHz should be less than the value
of R1.
The adjustable LT1579 is tested and specified with the
output pin tied to the adjust pin and a 3µA load (unless
otherwise noted) for an output voltage of 1.5V. Specifica-
tions for output voltages greater than 1.5V are propor-
tional to the ratio of the desired output voltage to 1.5V;
(V
OUT
/1.5V). For example, load regulation for an output
current change of 1mA to 300mA is –2mV typical at
V
OUT
= 1.5V. At V
OUT
= 12V, load regulation is:
12
15
216
V
V
mV mV
.
––
()
=
Output Capacitance and Transient Response
The LT1579 is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 4.7µF with an ESR of 3 or less is
recommended to prevent oscillations. Smaller value ca-
pacitors may be used, but capacitors which have a low
ESR (i.e. ceramics) may need a small series resistor added
to bring the ESR into the range suggested in Table 1. The
LT1579 is a micropower device and output transient
response is a function of output capacitance. Larger
values of output capacitance decrease the peak deviations
and provide improved output transient response for larger
load current changes. Bypass capacitors, used to decouple
individual components powered by the LT1579, will
increase the effective output capacitor value.
Table 1. Suggested ESR Range
OUTPUT CAPACITANCE SUGGESTED ESR RANGE
1.5µF1 to 3
2.2µF 0.5 to 3
3.3µF 0.2 to 3
4.7µF0 to 3
APPLICATIONS INFORMATION
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BIASCOMP Pin Compensation
The BIASCOMP pin is a connection to a compensation
point for the internal bias circuitry. It must be bypassed
with a 0.01µF capacitor for stability during the switch from
V
IN1
to V
IN2
.
“Hot” Plugging and Unplugging of Inputs
The LT1579 is designed to maintain regulation even if one
of the outputs is instantaneously removed. If the primary
input is supplying load current, removal and insertion of
the secondary input creates no noticeable transient at the
output. In this case, the LT1579 continues to supply
current from the primary; no switching is required. How-
ever, when load current is being supplied from the primary
input and it is removed, load current must be switched
from the primary to the secondary input. In this case, the
LT1579 sees the input capacitor as a rapidly discharging
battery. If it discharges too quickly, the LT1579 does not
have ample time to switch over without a large transient
occurring at the output. The input capacitor must be large
enough to supply load current during the transition from
primary to secondary input. Replacement of the primary
creates a smaller transient on the output because both
inputs are present during the transition. For a 100mA load,
input and output capacitors of 10µF will limit peak output
deviations to less than 50mV. See the “Hot” Plugging and
Unplugging Transient Response in the Typical Perfor-
mance Characteristics. Proportionally larger values for
input and output capacitors are needed to limit peak
deviations on the output when delivering larger load
currents.
Standby Mode
“Standby” mode is where one input draws a minimum
quiescent current when the other input is delivering all
bias and load currents . In this mode, the standby current
is the quiescent current drawn from the standby input. The
secondary input will be in standby mode, when the pri-
mary input is delivering all load and bias currents. When
the secondary input is in standby mode the current drawn
from the secondary input will be 3µA if V
IN1
> V
IN2
and 5µA
14
LT1579
if V
IN2
>V
IN1
, so typically only 3µA. The primary input will
automatically go into standby mode as the primary input
drops below the output voltage. The primary input can also
be forced into standby mode by asserting the SS pin. In
either case, the current drawn from the primary input is
reduced to a maximum of 7µA.
Shutdown
The LT1579 has a low power shutdown state where all
functions of the device are shut off. The device is put into
shutdown mode when the shutdown pin is pulled below
0.7V. The quiescent current in shutdown has three com-
ponents: 2µA drawn from the primary, 2µA drawn from the
secondary and 3µA which is drawn from the higher of the
two inputs.
Protecting Batteries Using Secondary Select (SS)
Some batteries, such as lithium-ion cells, are sensitive to
deep discharge conditions. Discharging these batteries
below a certain threshold severely shortens battery life. To
prevent deep discharge of the primary cells, the LT1579
secondary select (SS) pin can be used to switch power
draw from the primary input to the secondary. When this
pin is pulled low, current out of the primary is reduced to
2µA. A low-battery detector with the trip point set at the
critical discharge point can signal the low battery condi-
tion and force the switchover to the secondary as shown
in Figure 2. The second low-battery comparator can be
used to set a latch to shutdown the LT1579 (see the Typical
Applications).
APPLICATIONS INFORMATION
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Low-Battery Comparators
There are two independent low-battery comparators in the
LT1579. This allows for individual monitoring of each
input. The inverting inputs of both comparators are con-
nected to an internal 1.5V reference. The low-battery
comparator trip point is set by an external resistor divider
as shown in Figure 3. The current in R1 at the trip point is
1.5V/R1. The current in R2 is equal to the current in R1.
The low-battery comparator input bias current, 2nA flow-
ing out of the pin, is negligible and may be ignored. The
value of R1 should be less than 1.5M in order to minimize
errors in the trip point. The value of R2 for a given trip point
is calculated using the formulas in Figure 3.
The low-battery comparators have a small amount of
hysteresis built-in. The amount of hysteresis is dependent
upon the output sink current (I
SINK
) when the comparator
is tripped low. At no load, comparator hysteresis is zero,
increasing to a maximum of 18mV for sink currents above
20µA. See the curve of Low-Battery Comparator Hyster-
esis in the Typical Performance Characteristics. If larger
amounts of hysteresis are desired, R3 and D1 can be
added. D1 can be any small diode, typically a 1N4148.
Calculating V
LBO
can be done using a load line on the curve
of Logic Flag Output Voltage vs Sink Current in the Typical
Performance Characteristics.
Figure 2. Connecting SS to Low-Battery Detector
Output to Prevent Damage to Batteries
LBO
SS
GND
V
CC
R
P
1579 F02
Figure 3. Low-Battery Comparator Operation
15
LT1579
APPLICATIONS INFORMATION
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Example: The low-battery detector must be tripped at a
terminal voltage of 5.5V. There is a 100k pull-up resistor
to 5V on the output of the comparator and 200mV of
hysteresis is needed to prevent chatter. With a 1M resistor
for R1, what other resistor values are needed?
Using the formulas in Figure 3,
R
VVM
V
M2
55 15 1
15
267=
()
()
=Ω
.–.
.
.
Use a standard value of 2.7M. With the 100k pull-up
resistor, this gives a sink current and logic flag voltage of
approximately 45µA at 0.4V. The hysteresis in this case
will be:
Hysteresis mV
M
M
mV=+
=18 1
27
1
67
.
An additional 133mV of hysteresis is needed, so a resistor
and diode must be added. The value of R3 will be:
R
VmV V VM
mV
M3
15 18 06 04 27
133
10 5=
+
()
()
=Ω
.–...
.
A standard value of 10M can be used. The additional
current flowing through R3 into the comparator output is
negligible and can usually be ignored
Logic Flags
The low-battery comparator outputs and the status flags
of the LT1579 are open collector outputs capable of
sinking up to 5mA. See the curve of Logic Flag Output
Voltage vs. Current in the Typical Performance Character-
istics.
There are two status flags on the LT1579. The BACKUP
flag and the DROPOUT flag provide information on which
input is supplying power to the load and give early warning
of loss of output regulation. The BACKUP flag goes low
when the secondary input begins supplying power to the
load. The DROPOUT flag signals the dropout condition on
both inputs, warning of an impending drop in output
voltage. The conditions that set either status flag are
determined by input to output voltage differentials and
current supplied to the load from each input. Normal
output deviation during transient load conditions (with
sufficient input voltages) will not set the status flags.
Timing Diagram
The timing diagram for the 5V dual battery supply is shown
in Figure 4. The schematic is the same as the 5V Dual
Battery Supply on the front of the data sheet. All logic flag
outputs have 100k pull-up resistors added. Note that there
is no time scale for the timing diagram. The timing diagram
is meant as a tool to help in understanding basic operation
of the LT1579. Actual discharge rates will be a function of
the load current and the type of batteries used. The load
current used in the example was 100mA DC.
Figure 4. Basic Dual Battery Timing Diagram
AB C D E
6V
5V
V
IN1
6V
5V
5V
0
0
0
1
0
1
0
1
0
1
100mA
4.8V
100mA
V
IN2
I
IN1
I
IN2
V
OUT
BACKUP
DROPOUT
LB02
LB01
LTC1579 • F03

LT1579IGN-3#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 300mA Dual Input Smart LDO 3V
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