16
LT1579
APPLICATIONS INFORMATION
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Five milestones are noted on the timing diagram. Time A
is where the primary input voltage drops enough to trip the
low-battery detector LB1. The trip threshold for LB1 is set
at set at 5.5V, slightly above the dropout voltage of the
primary input. At time B, the BACKUP flag goes low,
signaling the beginning of the transition from the primary
source to the secondary source. Between times B and C,
the input current makes a smooth transition from V
IN1
to
V
IN2
. By time C, the primary battery has dropped below the
point where it can deliver useful current to the output. The
primary input will still deliver a small amount of current to
the load, diminishing as the primary input voltage drops.
By time D, the secondary battery has dropped to a low
enough voltage to trip the second low-battery detector,
LB2. The trip threshold for LB2 is also set at 5.5V, slightly
above where the secondary input reaches dropout. At time
E, both inputs are low enough to cause the LT1579 to enter
dropout, with the DROPOUT flag signaling the impending
loss of output regulation. After time E, the output voltage
drops out of regulation.
Some interesting things can be noted on the timing
diagram. The amount of current available from a given
input is determined by the input/output voltage differen-
tial. As the differential voltage drops, the amount of
current drawn from the input also drops, which slows the
discharge of the battery. Dropout detection circuitry will
maintain the maximum current draw from the input for the
given input/output voltage differential. In the case shown,
this causes the current drawn from the primary input to
approach zero, though never actually dropping to zero.
Note that the primary begins to supply significant current
again when the output drops out of regulation. This occurs
because the input/output voltage differential of the pri-
mary input increases as the output voltage drops. The
LT1579 will automatically maximize the power drawn
from the inputs to maintain the highest possible output
voltage.
Thermal Considerations
The power handling capability of the LT1579 is limited by
the maximum rated junction temperature (125°C). Power
dissipated is made up of two components:
1. The output current from each input multiplied by the
respective input to output voltage differential:
(I
OUT
)(V
IN
– V
OUT
) and
2. Ground pin current from the associated inputs multi-
plied by the respective input voltage: (I
GND
)(V
IN
).
If the primary input is not in dropout, all significant power
dissipation is from the primary input. Conversely, if SS has
been asserted to minimize power draw from the primary,
all significant power dissipation will be from the second-
ary. When the primary input enters dropout, calculation of
power dissipation requires consideration of power dissi-
pation from both inputs. Worst-case power dissipation is
found using the worst-case input voltage from either input
and the worst-case load current.
Ground pin current is found by examining the Ground Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components above for the input supplying power to the
load. Power dissipation from the other input is negligible.
The LT1579 has internal thermal limiting designed to
protect the device during overload conditions. For con-
tinuous normal load conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources nearby must also be considered.
Heating sinking for the device is accomplished by using
the heat spreading capabilities of the PC board and its
copper traces. Copper board stiffeners and plated through-
holes can also be used to spread the heat. All ground pins
on the LT1579 are fused to the die paddle for improved
heat spreading capabilities.
The following tables list thermal resistances for each pack-
age. Measured values of thermal resistance for several
different board sizes and copper areas are listed for each
package. All measurements were taken in still air on 3/32”
FR-4 board with one ounce copper. All ground leads were
connected to the ground plane. All packages for the
LT1579 have all ground leads fused to the die attach
paddle to lower thermal resistance. Typical thermal
17
LT1579
APPLICATIONS INFORMATION
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resistance from the junction to a ground lead is 40°C/W for
16-lead SSOP, 32°C/W for 16-lead SO and 35°C/W for
8-lead S0.
Table 2. 8-Lead SO Package (S8)
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 73°C/W
1000 sq mm 2500 sq mm 2500 sq mm 75°C/W
225 sq mm 2500 sq mm 2500 sq mm 80°C/W
100 sq mm 2500 sq mm 2500 sq mm 90°C/W
*Device is mounted on topside.
Table 3. 16-Lead SO Package (S)
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 55°C/W
1000 sq mm 2500 sq mm 2500 sq mm 58°C/W
225 sq mm 2500 sq mm 2500 sq mm 60°C/W
100 sq mm 2500 sq mm 2500 sq mm 68°C/W
*Device is mounted on topside.
Table 4. 16-Lead SSOP Package (GN)
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 70°C/W
1000 sq mm 2500 sq mm 2500 sq mm 75°C/W
225 sq mm 2500 sq mm 2500 sq mm 80°C/W
100 sq mm 2500 sq mm 2500 sq mm 95°C/W
*Device is mounted on topside.
Calculating Junction Temperature
Example: Given an output voltage of 5V, an input voltage
range of 5V to 7V for V
IN1
and 8V to 10V for V
IN2
, with an
output current range of 10mA to 150mA and a maximum
ambient temperature of 50°C, what will the maximum
junction temperature be?
When run from the primary input, current drawn from the
secondary input is negligible and worst-case power dissi-
pation will be:
(I
OUT(MAX)
)(V
IN1(MAX)
– V
OUT
) + (I
GND
)(V
IN1(MAX)
)
Where:
I
OUT(MAX)
= 150mA
V
IN1(MAX)
= 7V
I
GND
at (I
OUT
= 150mA, V
IN1
= 7V) = 2mA
Therefore,
P = (150mA)(7V – 5V) + (2mA)(7V) = 0.31W
When switched to the secondary input, current from the
primary input is negligible and worst-case power dissipa-
tion will be:
(I
OUT(MAX)
)(V
IN2(MAX)
– V
OUT
) + (I
GND
)(V
IN2(MAX)
)
Where:
I
OUT(MAX)
= 150mA
V
IN2(MAX)
= 10V
I
GND
at (I
OUT
= 150mA, V
IN2
= 10V) = 2mA
Therefore,
P = (150mA)(10V – 5V) + (2mA)(10V) = 0.77W
Using a 16-lead SO package, the thermal resistance will be
in the range of 55°C/W to 68°C/W dependent upon the
copper area. So the junction temperature rise above
ambient will be approximately equal to:
(0.77W)(65°C/W) = 50.1°C
The maximum junction temperature will then be equal to
the maximum temperature rise above ambient plus the
maximum ambient temperature or:
T
JMAX
= 50.1°C + 50°C = 100.1°C
Protection Features
The LT1579 incorporates several protection features that
make it ideal for use in battery-powered circuits. In addi-
tion to the normal protection features associated with
monolithic regulators, such as current limiting and ther-
mal limiting, the device is protected against reverse input
voltages, reverse output voltages and reverse voltages
from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
Current limit protection is designed to protect the device
if the output is shorted to ground. With the output shorted
to ground, current will be drawn from the primary input
until it is discharged. The current drawn from V
IN2
will not
increase until the primary input is discharged. This pre-
vents a short-circuit on the output from discharging both
inputs simultaneously.
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LT1579
APPLICATIONS INFORMATION
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The inputs of the device can withstand reverse voltages up
to 20V. Current flow into the device will be limited to less
than 1mA (typically less than 100µA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backwards. Internal
protection circuitry isolates the inputs to prevent current
flow from one input to the other. Even with one input
supplying all bias currents and the other being plugged in
backwards (a maximum total differential of 40V), current
flow from one input to another will be limited to less than
1mA. Output voltage will be unaffected. In the case of
reverse inputs, no reverse voltages will appear at the load.
Pulling the SS pin low will cause all load currents to come
from the secondary input. If the secondary input is not
present, the output will be turned off. If the part is put into
current limit with the SS pin pulled low, current limit will
be drawn from the secondary input until it is discharged,
at which point the current limit will drop to zero.
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
GN16 (SSOP) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
 SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
 FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
3
4
5
6
7
8
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
16
15
14
13
0.189 – 0.196*
(4.801 – 4.978)
12 11 10
9
0.016 – 0.050
(0.406 – 1.270)
0.015 ± 0.004
(0.38
± 0.10)
× 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.025
(0.635)
BSC

LT1579IGN-3#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 300mA Dual Input Smart LDO 3V
Lifecycle:
New from this manufacturer.
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