IPD03N03LB G

Type
IPD03N03LB G IPS03N03LB G
OptiMOS
®
2 Power-Transistor
Package
Marking
• Qualified according to JEDEC
1)
for target applications
• N-channel, logic level
• Excellent gate charge x R
DS(on)
product (FOM)
• Superior thermal resistance
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
Maximum ratings, at T
j
=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous drain current
I
D
T
C
=25 °C
2)
90 A
T
C
=100 °C
90
Pulsed drain current
I
D,pulse
T
C
=25 °C
3)
360
Avalanche energy, single pulse
E
AS
I
D
=90 A, R
GS
=25
240 mJ
Reverse diode dv /dt dv /dt
I
D
=90 A, V
DS
=20 V,
di /dt =200 A/µs,
T
j,max
=175 °C
6 kV/µs
Gate source voltage
4)
V
GS
±20 V
Power dissipation
P
tot
T
C
=25 °C
115 W
Operating and storage temperature
T
j
, T
stg
-55 ... 175 °C
IEC climatic category; DIN IEC 68-1 55/175/56
Value
V
DS
30 V
R
DS(on),max
3.3
m
I
D
90 A
Product Summary
Type
IPD03N03LB G IPS03N03LB G
Package
PG-TO252-3-11 PG-TO251-3-11
Marking
03N03LB 03N03LB
Rev. 1.7 page 1 2008-04-11
IPD03N03LB G IPS03N03LB G
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
R
thJC
- - 1.3 K/W
SMD version, device on PCB
R
thJA
minimal footprint - - 75
6 cm
2
cooling area
5)
--50
Electrical characteristics, at T
j
=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V
(BR)DSS
V
GS
=0 V, I
D
=1 mA
30 - - V
Gate threshold voltage
V
GS(th)
V
DS
=V
GS
, I
D
=70 µA
1.2 1.6 2
Zero gate voltage drain current
I
DSS
V
DS
=30 V, V
GS
=0 V,
T
j
=25 °C
- 0.1 1 µA
V
DS
=30 V, V
GS
=0 V,
T
j
=125 °C
- 10 100
Gate-source leakage current
I
GSS
V
GS
=20 V, V
DS
=0 V
- 10 100 nA
Drain-source on-state resistance
R
DS(on)
V
GS
=4.5 V, I
D
=60 A
- 4.1 5.1
m
V
GS
=4.5 V, I
D
=60 A,
SMD version
- 3.9 4.9
V
GS
=10 V, I
D
=60 A
- 3.0 3.5
V
GS
=10 V, I
D
=60 A,
SMD version
- 2.8 3.3
Gate resistance
R
G
- 1.3 -
Transconductance
g
fs
|V
DS
|>2|I
D
|R
DS(on)max
,
I
D
=60 A
60 120 - S
5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Values
1)
Current is limited by bondwire; with an R
thJC
=1.3 K/W the chip is able to carry 142 A.
3)
See figure 3
4)
T
j,max
=150 °C and duty cycle D <0.25 for V
GS
<-5 V
1)
J-STD20 and JESD22
Rev. 1.7 page 2 2008-04-11
IPD03N03LB G IPS03N03LB G
Parameter Symbol Conditions Unit
min. typ. max.
Dynamic characteristics
Input capacitance
C
iss
- 3900 5200 pF
Output capacitance
C
oss
- 1400 1900
Reverse transfer capacitance
C
rss
- 180 270
Turn-on delay time
t
d(on)
-1319ns
Rise time
t
r
-914
Turn-off delay time
t
d(off)
-4161
Fall time
t
f
- 6.2 9
Gate Char
g
e Characteristics
6)
Gate to source charge
Q
gs
-1216nC
Gate charge at threshold
Q
g(th)
- 6.3 8.3
Gate to drain charge
Q
gd
- 7.9 12
Switching charge
Q
sw
-1420
Gate charge total
Q
g
-3040
Gate plateau voltage
V
plateau
- 3.1 - V
Gate charge total, sync. FET
Q
g(sync)
V
DS
=0.1 V,
V
GS
=0 to 5 V
-2735nC
Output charge
Q
oss
V
DD
=15 V, V
GS
=0 V
-3142
Reverse Diode
Diode continous forward current
I
S
- - 90 A
Diode pulse current
I
S,pulse
- - 420
Diode forward voltage
V
SD
V
GS
=0 V, I
F
=90 A,
T
j
=25 °C
- 0.92 1.2 V
Reverse recovery charge
Q
rr
V
R
=15 V, I
F
=I
S
,
di
F
/dt =400 A/µs
- - 10 nC
6)
See figure 16 for gate charge parameter definition
T
C
=25 °C
Values
V
GS
=0 V, V
DS
=15 V,
f =1 MHz
V
DD
=15 V, V
GS
=10 V,
I
D
=45 A, R
G
=2.7
V
DD
=15 V, I
D
=45 A,
V
GS
=0 to 5 V
Rev. 1.7 page 3 2008-04-11

IPD03N03LB G

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
MOSFET N-Ch 30V 90A DPAK-2
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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