IXMS150PSI Datasheet IXMS150PSI | P7-P9

I - 41

Use the formula

C2 = 100 µF  100 kHz/f

OSC

for other frequencies.

With V

= 12 V and an oscillator fre-

quency of 100 kHz, the bias generator

should be able to source 3 mA at -2.4 V

using these component values. This

capability may be used to power other

external circuitry as long as there is

sufficient remaining negative bias to

allow the IXMS150 to operate properly.

Impact of PWM Frequency on

System Operation

PWM switching frequency has a

pronounced effect on ripple current

through the motor windings, the resul-

ting eddy current losses in the motor,

and system efficiency. As expected,

motor current ripple goes down as

frequency increases and therefore

losses resulting from ripple currents are

also reduced. Switching frequency also

impacts losses in the power stage.

These losses are associated with the

energy necessary to turn on and off the

power MOSFEts and are proportional

to the switching frequency. In addition,

the switching frequency has a limiting

effect on maximum current loop band-

width and therefore system bandwidth

and therefore system bandwidth and

maximum motor velocity.

Oscillator

The oscillator block diagram is shown

in Fig. 6.

The frequency is set by the values of

and C

OSC

= 1/R

 (C

+ C

)) (10)

Note: C

is a 38 pF (typ.) internal

parasitic capacitor.

IXMS 150

1/F

V(t)

2  V (PIN 7)

7 V (PIN 7 Open)

[

]

1/f

OSC

= R

 (C

+ C

)

Fig. 6a: Oscillator Block Diagram Fig. 6b: Oscillator Waveform Diagram

Feedforward

The amplitude of the oscillator wave-

form and overall system gain are modu-

lated by the voltage applied to the

feedforward pin (FFWD). This is nomi-

nally 3.5 V which should be divided

down from the motor high voltage

supply. This will allow system band-

width to be maximized by making

overall system gain inversely propor-

tional to the motor supply voltage.

Refer to Fig. 7 for an example of how

feedforward is connected to the motor

supply. It is recommended that a filter

capacitor be connected from FFWD to

AGND to filter noise spikes from the

motor supply. Its value should be

chosen so that the time constant of the

capacitor and the parallel combination

of R

ff1

and R

ff2

is such that switching

noise will be filtered but not variations

in the motor supply such as 120 Hz

ripple, etc.

Minimum Pulse Width

The minimum output pulse width can

also be modified by adjusting the oscil-

lator capacitor C

. The relationship is:

pw(min)

= R

 (C

+ C

)(11)

Note: R

is a 3.6 kΩ (typ.) internal

resistor, and C

is a 38 pF (typ.) internal

parasitic capacitor.

Dead Time

Dead time is adjusted via the external

oscillator capacitor C

. There is an

internal resistor in the dead time circuit

as well. The relationship is:

= R

 (C

+ C

) (12)

Note: R

is a 1.4 kΩ (typ.) internal

resistor and C

is a 38 pF (typ.) internal

parasitic capacitor.

Fig. 7 Feedforward Connection

Diagram

Motor Slew Rate Limitations

The maximum motor velocity in a

microstepping application is determined

by the maximum rate of change of the

phase currents. Once this limit is

reached the system is slew rate

limited, at which point the peak

undistorted phase current times the

frequency of the input command is a

fixed value. The theoretical limit for the

maximum di/dt of the phase currents is

determined by the motor supply voltage

and the inductance of the motor:

di/dt (max) = V

(13)

The limit does not take into account the

back EMF of the motor, the bandwidth

of the current loop driving the motor, or

the minimum pulse width. The motors

back

EMF will tend to reduce the voltage

applied across the motor windings,

effectively reducing the maximum slew

rate. The bandwidth of the current loop

must also be high enough so as not to

degrade system performance.

Non-Circulating Operating Mode

The IXMS150 is designed to control an

H-bridge in the non-circulating mode.

The equivalent circuit for an H-bridge is

shown in Fig. 8. In the non-circulating

1/f

OSC

I - 42

IXMS 150

mode, either SW1 and SW4 are on (V

= V

) or SW2 + SW3 are on (V

= -

). By appropriately controlling the

duty cycle of SW1//4 vs. SW2/3, the

average motor voltage can be controlled

such that:

m(avg)

= 2  V

(0.5-DUTY)

Note: DUTY is defined as the duty

cycle of V

OUTA

The IXMS150 can now regulate the

motor coil current by commanding the

voltage level and polarity required.

enhance the MOSFETs,

with the top two

transistors (Q2, Q4) being destroyed

due to excessive power dissipation.

Therefore one has to limit the duty

cycle excursions. The solution selected

by IXYS limits the minimum output

pulse-width to 0.5 ms, which translates

to a duty cycle range of 5 % to 95 %

when operating at 100 kHz, or wider at

lower frequencies. There is a penalty of

slightly limiting the maximum slew rate

to (1-2  Min Duty) of the unrestricted

case, which translates to 90 % of the

ration with a particular motor. The basic

elements involved in the current loop

are illustrated in Fig. 11a. Referring to

Fig. 11b, the loop gain for this system

(the product of the forward and feed-

back gain terms) can be expressed as:

loop

(s) = G

e/a

(s)  K

pwm

 G

(s)  G

(s) (14)

where

e/a

(s) = error amplifier gain

pwm

= cascade of pwm and output H-

bridge gain

Fig. 8 Simplified H-Bridge Diagram

SW1

SW3

SW2

SW4

D1 D2

D3 D4

The Power Stage:

An AC Coupled H-Bridge

Fig. 9 shows the power driver selected

for this application. Two of these are

required to drive the two phase step

motor. This circuit uses two N-channel

and two P-channel power MOSFETs as

opposed to an all N-channel architec-

ture. The drawback of using P-channel

transistors is that they are larger and

therefore more expensive than similarly

rated N-channel devices. But the

advantages are much simplified drive

and level shifting circuitry. This results

in a lower component count and

therefore higher reliability. It also lends

itself easily to hybridization. Other

advantages of this topology are: a) the

high efficiency associated with level

shifting by AC coupling since no power

is dissipated in the capacitors, and b)

the same circuit can be used for motor

applications

ranging from 12 V to several

hundred volts, the only modification

being appropriately rated power tran-

sistors and coupling capacitors.

limitation of this circuit is that it cannot

be used at duty cycle extremes. This

would require one input to be continu-

ously low while the other is continu-

ously high. Eventually the coupling

capacitors (C1, C2) would charge up to

a voltage that would no longer fully

Fig. 9 AC Coupled H-Bridge Diagram

Fig. 10a Simplified Microstepping System

unrestricted maximum slew rate for

100 kHz operation.

Loop Compensation Information

When used with the appropriate power

stage, each channel of the IXMS150

acts as a closed loop transconductance

amplifier. As such, it must be properly

compensated to guarantee stable ope-

(s) = cascade of motor winding

impedance and H-bridge parasitic

resistance

(s) = current sense resistor and

sampling amplifier gain

The value of each of these terms can

be determined from the Laplace

transform diagram in Fig. 11b:

I - 43

IXMS 150

Fig. 10b Input Offset Adjust Circuit

= motor inductance

= motor winding resistance

= power switch resistance

= sense resistor

It is very important that the motor induc-

tance value used in the analysis is not

the value on the manufacturers data

sheet but rather the value observed in

actual operation. The PWM action

causes high frequency effects that can

change the apparent small signal

inductance significantly. These effects

are dependent upon voltage as well as

current and frequency. It is best to

measure the observed current ripple at

the motor supply voltage and switching

frequency you expect to use and

calculate the actual motor inductance

using:

= V

/((2  F

osc

)(I

max

-I

min

)) (19)

It is also important to note that both R

and R

are temperature dependent.

The motor winding resistance can

increase by as much as 30 % at high

temperatures, and if FETs are used as

power devices, R

can increase to 2.2

times its value at room temperature.

Substituting equations 15 through 18

into equation 14 gives the expanded

loop gain equation (eq. 20):

(1+sRC)  2Vhv  1  2Rs

loop

(s) =

C  V

 (sL

)

which can be written as (eq.21):

4  V

 R

loop

(s) = 

 R

)

(1+RC)

(sR



C) [1+sL

)]

Therefore the poles and zeros of the

system are:

pole at DC, with a 0dB intercept of:

/[V

C(R

+ R

)]

zero at 1/(R  C)

pole at (R

+ R

) /L

A simple Bode analysis can be per-

formed to provide the necessary infor-

mation to guarantee the stability of the

loop. A stable system will result when

the gain crossover occurs at a point

where the loop phase shift is less than -

180 degrees. The gain crossover point

is defined as the frequency where the

magnitude of G

loop

(s) = 1 (0dB).

The Bode plot will show two figures of

merit that give an indication of the

behavior of the closed loop system,

gain margin and phase margin. Gain

margin is the amount of loop signal at-

tenuation at the point where the loop

phase has reached -180 degrees. It is a

qualitative measure of how susceptible

the loop is to noise outside its band-

width. Phase margin is the amount of

Fig. 10c Gain Adjust Circuit

e/a

(s) = (1 + sRC)/(sR

C) (15)

pwm

= 2  V

(16)

(S) = 1/(sL

+ R

) (17)

(s) = 2  R

(ignoring sampling effects) (18)

where:

R, C = external compensation

components

= internal input resistor,

typically 20 kΩ

= motor high voltage power supply

= oscillator amplitude, typically 7 V

Fig. 11a Loop Compensation Block Diagram

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