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LTC3703IGN#TRPBF

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LTC3703
7
3703fc
pin FuncTions
(GN16/G28)
MODE/SYNC (Pin 1/Pin 6): Pulse-Skip Mode Enable/Sync
Pin. This multifunction pin provides pulse-skip mode
enable/disable control and an external clock input for
synchronization of the internal oscillator. Pulling this pin
below 0.8V or to an external logic-level synchronization
signal disables pulse-skip mode operation and forces
continuous operation. Pulling the pin above 0.8V enables
pulse-skip mode operation. This pin can also be connected
to a feedback resistor divider from a secondary winding
on the inductor to regulate a second output voltage.
f
SET
(Pin 2/Pin 7): Frequency Set. A resistor connected
to this pin sets the free running frequency of the internal
oscillator. See Applications Information section for resistor
value selection details.
COMP (Pin 3/Pin 8): Loop Compensation. This pin is con-
nected directly to the output of the internal error amplifier.
An RC network is used at the COMP pin to compensate
the feedback loop for optimal transient response.
FB (Pin 4/Pin 9): Feedback Input. Connect FB through a
resistor divider network to V
OUT
to set the output volt-
age. Also connect the loop compensation network from
COMP to FB.
I
MAX
(Pin 5/Pin 10): Current Limit Set. The I
MAX
pin sets
the current limit comparator threshold. If the voltage drop
across the bottom MOSFET exceeds the magnitude of the
voltage at I
MAX
, the controller goes into current limit. The
I
MAX
pin has an internal 12µA current source, allowing the
current threshold to be set with a single external resistor
to ground. See the Current Limit Programming section
for more information on choosing R
IMAX
.
INV (Pin 6/Pin 11): Top/Bottom Gate Invert. Pulling this
pin above 2V sets the controller to operate in step-up
(boost) mode with the TG output driving the synchronous
MOSFET and the BG output driving the main switch. Below
1V, the controller will operate in step-down (buck) mode.
RUN/SS (Pin 7/Pin 13): Run/Soft-Start. Pulling RUN/SS
below 0.9V will shut down the LTC3703, turn off both of
the external MOSFET switches and reduce the quiescent
supply current to 50µA. A capacitor from RUN/SS to
ground will control the turn-on time and rate of rise of
the output voltage at power-up. An internal 4µA current
source pull-up at the RUN/SS pin sets the turn-on time
at approximately 750ms/µF.
GND (Pin 8/Pin 14): Ground Pin
.
BGRTN
(Pin 9/Pin 15): Bottom Gate Return. This pin
connects to the source of the pull-down MOSFET in the
BG driver and is normally connected to ground. Connect-
ing a negative supply to this pin allows the synchronous
MOSFET’s gate to be pulled below ground to help prevent
false turn-on during high dV/dt transitions on the SW node.
See the Applications Information section for more details.
BG (Pin 10/Pin 19): Bottom Gate Drive. The BG pin drives
the gate of the bottom N-channel synchronous switch
MOSFET. This pin swings from BGRTN to DRV
CC
.
DRV
CC
(Pin 11/Pin 20): Driver Power Supply Pin. DRV
CC
provides power to the BG output driver. This pin should
be connected to a voltage high enough to fully turn on
the external MOSFETs, normally 10V to 15V for standard
threshold MOSFETs. DRV
CC
should be bypassed to BGRTN
with a 10µF, low ESR (X5R or better) ceramic capacitor.
V
CC
(Pin 12/Pin 21): Main Supply Pin. All internal circuits
except the output drivers are powered from this pin. V
CC
should be connected to a low noise power supply voltage
between 9V and 15V and should be bypassed to GND
(Pin 8) with
at least a 0.1µF capacitor in close proximity
to the LTC3703.
SW (Pin 13/Pin 26): Switch Node Connection to Inductor
and Bootstrap Capacitor. Voltage swing at this pin is from a
Schottky diode (external) voltage drop below ground to V
IN
.
TG (Pin 14/Pin 27): Top Gate Drive. The TG pin drives the
gate of the top N-channel synchronous switch MOSFET.
The TG driver draws power from the BOOST pin and
returns to the SW pin, providing true floating drive to the
top MOSFET.
BOOST (Pin 15/Pin 28): Top Gate Driver Supply. The
BOOST pin supplies power to the floating TG driver. The
BOOST pin should be bypassed to SW with a low ESR
(X5R or better) 0.1µF ceramic capacitor. An additional fast
recovery Schottky diode from DRV
CC
to BOOST will create
a complete floating charge-pumped supply at BOOST.
V
IN
(Pin 16/Pin 1): Input Voltage Sense Pin. This pin is
connected to the high voltage input of the regulator and is
used by the internal feedforward compensation circuitry
to improve line regulation. This is not a supply pin.
LTC3703
8
3703fc
FuncTional DiagraM
5
1
UVSD OTSD
CHIP
SD
0.9V
3.2V
4µA
RUN/SS
BANDGAP
SYNC
DETECT
OVER
TEMP
V
CC
UVLO
OSC
% DC
LIMIT
DRIVE
LOGIC
+
–
+
–
+
–
+
–
EXT SYNC
FORCED CONTINUOUS
÷
+
+
–
+
–
+
–
+
–
0.8V
MODE/SYNC
3
COMP
4
FB
16
15
14
13
11
10
9
6
12
V
IN
V
CC
(<15V)
INV
PWM
MIN MAX
0.76V
0.84V
±
OVERCURRENT
12µA
50mV
I
MAX
R
MAX
BOOST
TG
SW
DRV
CC
BG
BGRTN
INV
8
GND
GN16
OT SD 0.8V
REFERENCE
INTERNAL
3.2V V
CC
UV SD
2
f
SET
3703 FD
REVERSE
CURRENT
FB
R
SET
5
C
SS
R2
R1
V
CC
C
VCC
D
B
C
B
V
CC
V
IN
M1
M2
C
OUT
V
OUT
L1
INV
±
operaTion
(Refer to Functional Diagram)
The LTC3703 is a constant frequency, voltage mode con-
troller for DC/DC step-down converters. It is designed to
be used in a synchronous switching architecture with two
external N-channel MOSFETs. Its high operating voltage
capability allows it to directly step down input voltages up
to 100V without the need for a step-down transformer. For
circuit operation, please refer to the Functional Diagram
of the IC and Figure 1. The LTC3703 uses voltage mode
control in which the duty ratio is controlled directly by
the error amplifier output and thus requires no current
sense resistor. The V
FB
pin receives the output voltage
feedback and is compared to the internal 0.8V reference
by the error amplifier, which outputs an error signal at the
COMP pin. When the load current increases, it causes a
LTC3703
9
3703fc
operaTion
drop in the feedback voltage relative to the reference. The
COMP voltage then rises, increasing the duty ratio until
the output feedback voltage again matches the reference
voltage. In normal operation, the top MOSFET is turned
on when the RS latch is set by the on-chip oscillator and
is turned off when the PWM comparator trips and resets
the latch. The PWM comparator trips at the proper duty
ratio by comparing the error amplifier output (after being
“compensated” by the line feedforward multiplier) to a
sawtooth waveform generated by the oscillator. When the
top MOSFET is turned off, the bottom MOSFET is turned
on until the next cycle begins or, if pulse-skip mode op-
eration is enabled, until the inductor current reverses as
determined by the reverse current comparator. MAX and
MIN comparators ensure that the output never exceed
±5% of nominal value by monitoring V
FB
and forcing the
output back into regulation quickly by either keeping the top
MOSFET off or forcing maximum duty cycle. The operation
of its other features—fast transient response, outstanding
line regulation, strong gate drivers, short-circuit protection
and shutdown/soft-start—are described below.
Fast Transient Response
The LTC3703 uses
a fast 25MHz op amp as an error ampli-
f
ier. This allows the compensation network to be optimized
for better load transient response. The high bandwidth of
the amplifier, along with high switching frequencies and
low value inductors, allow very high loop crossover fre-
quencies. The 800mV internal reference allows regulated
output voltages as low as 800mV without external level
shifting amplifiers.
Line Feedforward Compensation
The LTC3703 achieves outstanding line transient response
using a patented feedforward correction scheme. With
this circuit the duty cycle is adjusted instantaneously to
changes in input voltage, thereby avoiding unacceptable
overshoot or undershoot. It has the added advantage of
making the DC loop gain independent of input voltage.
Figure 2 shows how large transient steps at the input have
little effect on the output voltage.
Strong Gate Drivers
The LTC3703 contains very low impedance drivers capable
of supplying amps of current to slew large MOSFET gates
quickly. This minimizes transition losses and allows paral-
leling MOSFETs for higher current applications. A 100V
floating high side driver drives the topside MOSFET and
a low side driver drives the bottom side MOSFET (see
Figure 3). They can be powered from either a separate
DC supply or a voltage derived
from the input or output
voltage (see MOSFET Driver Supplies section). The bottom
side driver is supplied directly from the DRV
CC
pin. The
top MOSFET drivers are biased from floating bootstrap
capacitor, C
B
, which normally is recharged during each off
cycle through an external diode from DRV
CC
when the top
MOSFET turns off. In pulse-skip mode operation, where
it is possible that the bottom MOSFET will be off for an
extended period of time, an internal counter guarantees
that the bottom MOSFET is turned on at least once every
10 cycles for 10% of the period to refresh the bootstrap
capacitor. An undervoltage lockout keeps the LTC3703
shut down unless this voltage is above 8.7V.
The bottom driver has an additional feature that helps
minimize the possibility of external MOSFET shoot-through.
When the top MOSFET turns on, the switch node dV/dt
pulls up the bottom MOSFET’s internal gate through the
Miller capacitance, even when the bottom driver is holding
the gate terminal at ground. If the gate is pulled up high
enough, shoot-through between the topside and bottom
V
OUT
50mV/DIV
V
IN
20V/DIV
I
L
2A/DIV
20µs/DIV
3703 F02
V
OUT
= 12V
I
LOAD
= 1A
25V TO 60V V
IN
STEP
Figure 2. Line Transient Performance
(Refer to Functional Diagram)
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LTC3703IGN#TRPBF

Mfr. #:
Buy LTC3703IGN#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100V Step-Down DC/DC Controller
Lifecycle:
New from this manufacturer.
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