.......................DOC #: SP-AP-0021 (Rev AB) Page 11 of 27
Byte 13: Control Register 13
Bit @Pup Name Description
7 1 USB_Bit1 USB drive strength control, See Byte 18 for more setting
0 = Low, 1= High
6 1 PCI/PCIF_Bit1 PCI drive strength control, See Byte 18 for more setting
0 = Low, 1 = High
5 0 PLL1_Spread Select percentage of spread for PLL1
0 = 0.5%, 1=0.45%
4 0 SATA_SS_EN Enable SATA spread modulation,
0 = Spread Disabled 1 = Spread Enabled
3 1 EN_CFG0_SET By defalult CFG0 pin strap sets the SMBus initial values to select the HW
mode. When this bit is written0, subsequent SMBus accesses is the Lathes
Open state, can overwrite the CFG0 pin setting into the SMBus bits and set
the mode before the M0 state: specifically B0b2, B1b[6,4,3], B9b1, B11b5
2 1 SE1/SE2_Bit1 SE1 and SE2 drive strength control, See Byte 18 for more setting
0 = Low, 1 = High
1 1 RESERVED RESERVED
0 1 SW_PCI SW PCI_STP# Function
0 = SW PCI_STP assert, 1 = SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
Byte 14: Control Register 14
Bit @Pup Name Description
7 0 CPU_DAF_N7 If Prog_CPU_EN is set, the values programmed in CPU_DAF_N[8:0] and
CPU_DAF_M[6:0] will be used to determine the CPU output frequency. The
setting of the FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[C:A] register will be used. When it is set, the frequency ratio
stated in the FSEL[2:0] register will be used
6 0 CPU_DAF_N6
5 0 CPU_DAF_N5
4 0 CPU_DAF_N4
3 0 CPU_DAF_N3
2 0 CPU_DAF_N2
1 0 CPU_DAF_N1
0 0 CPU_DAF_N0
Byte 15: Control Register 15
Bit @Pup Name Description
7 0 CPU_DAF_N8 See Byte 14 for description
6 0 CPU_DAF_M6 If Prog_CPU_EN is set, the values programmed are in CPU_FSEL_N[8:0]
and CPU_FSEL_M[6:0] will be used to determine the CPU output
frequency. The setting of the FS_Override bit determines the frequency
ratio for CPU and other output clocks. When it is cleared, the same
frequency ratio stated in the Latched FS[C:A] register will be used. When it
is set, the frequency ratio stated in the FSEL[2:0] register will be used
5 0 CPU_DAF_M5
4 0 CPU_DAF_M4
3 0 CPU_DAF_M3
2 0 CPU_DAF_M2
1 0 CPU_DAF_M1
0 0 CPU_DAF_M0
Byte 16: Control Register 16
Bit @Pup Name Description
