DS2760
14
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. A multidrop bus is a
1-Wire bus with multiple slaves. A single-drop bus has only one slave device. In all instances, the
DS2760 is a slave device. The bus master is typically a microprocessor in the host system. The
discussion of this bus system consists of four topics: 64-Bit Net Address, Hardware Configuration,
Transaction Sequence, and 1-Wire Signaling.
64-BIT NET ADDRESS
Each DS2760 has a unique, factory-programmed 1-Wire net address which is 64 bits in length. The first
8 bits are the 1-Wire family code (30h for DS2760). The next 48 bits are a unique serial number. The
last 8 bits are a CRC of the first 56 bits (see Figure 13). The 64-bit net address and the 1-Wire I/O
circuitry built into the device enable the DS2760 to communicate via the 1-Wire protocol detailed in the
1-Wire Bus System section of this data sheet.
1-WIRE NET ADDRESS FORMAT Figure 13
8-bit CRC 48-bit Serial Number 8-Bit Family Code 30h)
MSb LSb
CRC GENERATION
The DS2760 has an 8-bit CRC stored in the most significant byte of its 1-Wire net address. To ensure
error-free transmission of the address, the host system can compute a CRC value from the first 56 bits of
the address and compare it to the CRC from the DS2760. The host system is responsible for verifying the
CRC value and taking action as a result. The DS2760 does not compare CRC values and does not
prevent a command sequence from proceeding as a result of a CRC mismatch. Proper use of the CRC
can result in a communication channel with a very high level of integrity.
The CRC can be generated by the host using a circuit consisting of a shift register and XOR gates as
shown in Figure 10, or it can be generated in software. Additional information about the Dallas 1-Wire
Cyclic Redundancy Check is available in Application Note 27 entitled “
Understanding and Using Cyclic
Redundancy Checks with Dallas Semiconductor Touch Memory Products”. (This application note can be
found on the Maxim/Dallas Semiconductor website at www.maxim-ic.com).
In the circuit in Figure 14, the shift register bits are initialized to 0. Then, starting with the least
significant bit of the family code, one bit at a time is shifted in. After the 8
th
bit of the family code has
been entered, then the serial number is entered. After the 48
th
bit of the serial number has been entered,
the shift register contains the CRC value.